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From: Peter Maydell <peter.maydell@linaro.org>
To: Aleksandar Rakic <aleksandar.rakic@htecgroup.com>
Cc: "qemu-devel@nongnu.org" <qemu-devel@nongnu.org>,
	"cfu@mips.com" <cfu@mips.com>,
	 Djordje Todorovic <Djordje.Todorovic@htecgroup.com>,
	"arikalo@gmail.com" <arikalo@gmail.com>,
	 "philmd@linaro.org" <philmd@linaro.org>,
	Faraz Shahbazker <fshahbazker@wavecomp.com>
Subject: Re: [PATCH v5 2/3] Skip NaN mode check for soft-float
Date: Wed, 12 Mar 2025 15:05:44 +0000	[thread overview]
Message-ID: <CAFEAcA8RjNTZsuhShFwFUHa+YP5VKBUw2RneUPwAJ9eOVAL5Vw@mail.gmail.com> (raw)
In-Reply-To: <20250226170246.1971355-4-aleksandar.rakic@htecgroup.com>

On Wed, 26 Feb 2025 at 17:03, Aleksandar Rakic
<aleksandar.rakic@htecgroup.com> wrote:
>
> From: Aleksandar Rakic <aleksandar.rakic@htecgroup.com>
>
> Skip NaN mode check for soft-float since NaN mode is irrelevant if an ELF
> binary's FPU mode is soft-float, i.e. it doesn't utilize a FPU.
>
> Cherry-picked 63492a56485f6b755fccf7ad623f7a189bfc79b6
> from https://github.com/MIPS/gnutools-qemu
>
> Signed-off-by: Faraz Shahbazker <fshahbazker@wavecomp.com>
> Signed-off-by: Aleksandar Rakic <aleksandar.rakic@htecgroup.com>
> ---
>  linux-user/mips/cpu_loop.c | 6 ++++--
>  1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/linux-user/mips/cpu_loop.c b/linux-user/mips/cpu_loop.c
> index 462387a073..07c1ebe287 100644
> --- a/linux-user/mips/cpu_loop.c
> +++ b/linux-user/mips/cpu_loop.c
> @@ -304,8 +304,10 @@ void target_cpu_copy_regs(CPUArchState *env, struct target_pt_regs *regs)
>      if (env->insn_flags & ISA_NANOMIPS32) {
>          return;
>      }
> -    if (((info->elf_flags & EF_MIPS_NAN2008) != 0) !=
> -        ((env->active_fpu.fcr31 & (1 << FCR31_NAN2008)) != 0)) {
> +    if (info->fp_abi != MIPS_ABI_FP_SOFT
> +        && ((info->elf_flags & EF_MIPS_NAN2008) != 0) !=
> +           ((env->active_fpu.fcr31 & (1 << FCR31_NAN2008)) != 0))
> +      {
>          if ((env->active_fpu.fcr31_rw_bitmask &
>                (1 << FCR31_NAN2008)) == 0) {
>              fprintf(stderr, "ELF binary's NaN mode not supported by CPU\n");

Unless I'm misreading the code, the kernel's MIPS ELF loader
does not look at the fp_abi to decide how to handle the
NAN2008 bit:

https://elixir.bootlin.com/linux/v6.13.6/source/arch/mips/kernel/elf.c#L154

I think QEMU should handle this bit the same way as the kernel's
loader.

thanks
-- PMM


  parent reply	other threads:[~2025-03-12 15:35 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-02-26 17:02 [PATCH v5 0/3] Improve Mips target Aleksandar Rakic
2025-02-26 17:03 ` Aleksandar Rakic
2025-02-26 17:03 ` [PATCH v5 2/3] Skip NaN mode check for soft-float Aleksandar Rakic
2025-03-12 14:29   ` Aleksandar Rakic
2025-03-12 15:05   ` Peter Maydell [this message]
2025-03-18 11:31     ` Aleksandar Rakic
2025-03-18 11:35       ` Peter Maydell
2025-03-18 13:00     ` Aleksandar Rakic
2025-03-18 13:08       ` Peter Maydell
2025-03-18 13:18         ` Aleksandar Rakic
2025-02-26 17:03 ` [PATCH v5 1/3] Add support for emulation of CRC32 instructions Aleksandar Rakic
2025-03-12 14:26   ` Aleksandar Rakic
2025-03-18 13:45     ` Aleksandar Rakic
2025-03-26 12:31       ` Aleksandar Rakic
2025-04-23 12:57         ` Aleksandar Rakic
2025-05-14 14:10           ` Aleksandar Rakic
2025-05-19 12:24             ` Aleksandar Rikalo
2025-06-24  8:08               ` Aleksandar Rakic
2025-06-24  9:18   ` Daniel P. Berrangé
2025-02-26 17:03 ` [PATCH v5 3/3] target/mips: Enable MSA ASE using a CLI flag Aleksandar Rakic
2025-02-26 17:16   ` Richard Henderson

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