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From: Peter Maydell <peter.maydell@linaro.org>
To: "Inès Varhol" <ines.varhol@telecom-paris.fr>
Cc: qemu-devel@nongnu.org, qemu-arm@nongnu.org,
	"Arnaud Minier" <arnaud.minier@telecom-paris.fr>,
	"Philippe Mathieu-Daudé" <philmd@linaro.org>
Subject: Re: [PATCH 3/3] hw/arm: In STM32L4x5 SOC, connect USART devices to EXTI
Date: Mon, 20 May 2024 15:31:12 +0100	[thread overview]
Message-ID: <CAFEAcA8T52urOcc9vsPtO5R8ZBTHqGeLJBtmRmZGvRJMwSAyCw@mail.gmail.com> (raw)
In-Reply-To: <20240512102013.211127-4-ines.varhol@telecom-paris.fr>

On Sun, 12 May 2024 at 11:20, Inès Varhol <ines.varhol@telecom-paris.fr> wrote:
>
> The USART devices were previously connecting their outbound IRQs
> directly to the CPU because the EXTI wasn't handling direct lines
> interrupts.
> Now the USART connects to the EXTI inbound GPIOs, and the EXTI connects
> its IRQs to the CPU.
> The existing QTest for the USART (tests/qtest/stm32l4x5_usart-test.c)
> checks that USART1_IRQ in the CPU is pending when expected so it
> confirms that the connection through the EXTI still works.
>
> Signed-off-by: Inès Varhol <ines.varhol@telecom-paris.fr>

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>

thanks
-- PMM


      reply	other threads:[~2024-05-20 14:32 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-05-12 10:19 [PATCH 0/3] Connect STM32L4x5 USART devices to the EXTI Inès Varhol
2024-05-12 10:19 ` [PATCH 1/3] hw/misc: In STM32L4x5 EXTI, consolidate 2 constants Inès Varhol
2024-05-20 14:30   ` Peter Maydell
2024-05-12 10:19 ` [PATCH 2/3] hw/misc: In STM32L4x5 EXTI, handle direct line interrupts Inès Varhol
2024-05-20 14:30   ` Peter Maydell
2024-05-12 10:19 ` [PATCH 3/3] hw/arm: In STM32L4x5 SOC, connect USART devices to EXTI Inès Varhol
2024-05-20 14:31   ` Peter Maydell [this message]

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