From: Peter Maydell <peter.maydell@linaro.org>
To: QEMU Developers <qemu-devel@nongnu.org>
Subject: Re: [Qemu-devel] [PULL 00/16] target-arm queue
Date: Fri, 29 Aug 2014 16:46:53 +0100 [thread overview]
Message-ID: <CAFEAcA8V2kMBQFs_vscfUBEGQynv997AQhwPdt5Ce2-m5e60WQ@mail.gmail.com> (raw)
In-Reply-To: <1409323049-19255-1-git-send-email-peter.maydell@linaro.org>
On 29 August 2014 15:37, Peter Maydell <peter.maydell@linaro.org> wrote:
>
> target-arm queue: I wanted to send out some of the easier stuff in
> my review queue, at least. I'll try to work through the meatier
> review work next week...
>
> thanks
> -- PMM
>
> The following changes since commit d9aa68855724752a5684c6acfb17d8db15cec2f8:
>
> Merge remote-tracking branch 'remotes/kraxel/tags/pull-usb-20140829-1' into staging (2014-08-29 13:08:04 +0100)
>
> are available in the git repository at:
>
>
> git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20140829
>
> for you to fetch changes up to 0614601cecc8e5d9c6c5fa606b39fe388a18583a:
>
> target-arm: Implement pmccfiltr_write function (2014-08-29 15:00:30 +0100)
>
> ----------------------------------------------------------------
> target-arm queue:
> * support PMCCNTR in ARMv8
> * various GIC fixes and cleanups
> * Correct Cortex-A57 ISAR5 and AA64ISAR0 ID register values
> * Fix regression that disabled VFP for ARMv5 CPUs
> * Update to upstream VIXL 1.5
>
> ----------------------------------------------------------------
Applied, thanks.
-- PMM
next prev parent reply other threads:[~2014-08-29 15:47 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-08-29 14:37 [Qemu-devel] [PULL 00/16] target-arm queue Peter Maydell
2014-08-29 14:37 ` [Qemu-devel] [PULL 01/16] disas/libvixl: Update to upstream VIXL 1.5 Peter Maydell
2014-08-29 14:37 ` [Qemu-devel] [PULL 02/16] target-arm: Fix regression that disabled VFP for ARMv5 CPUs Peter Maydell
2014-08-29 14:37 ` [Qemu-devel] [PULL 03/16] target-arm: Correct Cortex-A57 ISAR5 and AA64ISAR0 ID register values Peter Maydell
2014-08-29 14:37 ` [Qemu-devel] [PULL 04/16] arm_gic: Fix read of GICD_ICFGR Peter Maydell
2014-08-29 14:37 ` [Qemu-devel] [PULL 05/16] arm_gic: GICD_ICFGR: Write model only for pre v1 GICs Peter Maydell
2014-08-29 14:37 ` [Qemu-devel] [PULL 06/16] arm_gic: Do not force PPIs to edge-triggered mode Peter Maydell
2014-08-29 14:37 ` [Qemu-devel] [PULL 07/16] arm_gic: Use GIC_NR_SGIS constant Peter Maydell
2014-08-29 14:37 ` [Qemu-devel] [PULL 08/16] aarch64: raise max_cpus to 8 Peter Maydell
2014-08-29 14:37 ` [Qemu-devel] [PULL 09/16] hw/intc/arm_gic: honor target mask in gic_update() Peter Maydell
2014-08-29 14:37 ` [Qemu-devel] [PULL 10/16] target-arm: Make the ARM PMCCNTR register 64-bit Peter Maydell
2014-08-29 14:37 ` [Qemu-devel] [PULL 11/16] arm: Implement PMCCNTR 32b read-modify-write Peter Maydell
2014-08-29 14:37 ` [Qemu-devel] [PULL 12/16] target-arm: Implement PMCCNTR_EL0 and related registers Peter Maydell
2014-08-29 14:37 ` [Qemu-devel] [PULL 13/16] target-arm: Add arm_ccnt_enabled function Peter Maydell
2014-08-29 14:37 ` [Qemu-devel] [PULL 14/16] target-arm: Implement pmccntr_sync function Peter Maydell
2014-08-29 14:37 ` [Qemu-devel] [PULL 15/16] target-arm: Remove old code and replace with new functions Peter Maydell
2014-08-29 14:37 ` [Qemu-devel] [PULL 16/16] target-arm: Implement pmccfiltr_write function Peter Maydell
2014-08-29 15:46 ` Peter Maydell [this message]
-- strict thread matches above, loose matches on Subject: below --
2018-05-15 14:06 [Qemu-devel] [PULL 00/16] target-arm queue Peter Maydell
2018-05-15 15:00 ` Peter Maydell
2018-11-12 17:08 Peter Maydell
2018-11-13 11:52 Peter Maydell
2018-11-13 11:54 ` Peter Maydell
2019-02-28 11:08 Peter Maydell
2019-02-28 11:25 ` no-reply
2019-02-28 19:03 ` Peter Maydell
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=CAFEAcA8V2kMBQFs_vscfUBEGQynv997AQhwPdt5Ce2-m5e60WQ@mail.gmail.com \
--to=peter.maydell@linaro.org \
--cc=qemu-devel@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).