From: Peter Maydell <peter.maydell@linaro.org>
To: Chris Rauer <crauer@google.com>
Cc: kfting@nuvoton.com, wuhaotsh@google.com, qemu-arm@nongnu.org,
qemu-devel@nongnu.org
Subject: Re: [PATCH] hw/timer/npcm7xx_timer: Prevent timer from counting down past zero
Date: Tue, 17 Oct 2023 14:18:38 +0100 [thread overview]
Message-ID: <CAFEAcA8XY1_W9YPtg1NOPYmEyL1H8AS9nT-BTXZGrNkjFBW_dg@mail.gmail.com> (raw)
In-Reply-To: <20230922181411.2697135-1-crauer@google.com>
On Fri, 22 Sept 2023 at 19:14, Chris Rauer <crauer@google.com> wrote:
>
> The counter register is only 24-bits and counts down. If the timer is
> running but the qtimer to reset it hasn't fired off yet, there is a chance
> the regster read can return an invalid result.
>
> Signed-off-by: Chris Rauer <crauer@google.com>
Applied to target-arm.next, thanks.
(As a side note, if you'd used the ptimer countdown-timer functions
to implement this timer, this is one of the corner cases that it
would have got right for you ;-))
-- PMM
prev parent reply other threads:[~2023-10-17 13:19 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-22 18:14 [PATCH] hw/timer/npcm7xx_timer: Prevent timer from counting down past zero Chris Rauer
2023-09-22 18:24 ` Hao Wu
2023-09-22 21:20 ` Chris Rauer
2023-10-17 13:18 ` Peter Maydell [this message]
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