From: Peter Maydell <peter.maydell@linaro.org>
To: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
Cc: "Rob Herring" <rob.herring@linaro.org>,
"Peter Crosthwaite" <peter.crosthwaite@xilinx.com>,
"Fabian Aggeler" <aggelerf@ethz.ch>,
"QEMU Developers" <qemu-devel@nongnu.org>,
"Alexander Graf" <agraf@suse.de>,
"Blue Swirl" <blauwirbel@gmail.com>,
"John Williams" <john.williams@xilinx.com>,
"Greg Bellows" <greg.bellows@linaro.org>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Alex Bennée" <alex.bennee@linaro.org>,
"Christoffer Dall" <christoffer.dall@linaro.org>,
"Richard Henderson" <rth@twiddle.net>
Subject: Re: [Qemu-devel] [PATCH v3 15/16] target-arm: Add IRQ and FIQ routing to EL2 and 3
Date: Fri, 1 Aug 2014 15:27:44 +0100 [thread overview]
Message-ID: <CAFEAcA8Y0ZhNXQwFX4DkVnbhEcWCqErVaDXt-m5g6aZspetxnA@mail.gmail.com> (raw)
In-Reply-To: <1402994746-8328-16-git-send-email-edgar.iglesias@gmail.com>
On 17 June 2014 09:45, Edgar E. Iglesias <edgar.iglesias@gmail.com> wrote:
> From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>
> --- a/target-arm/helper.c
> +++ b/target-arm/helper.c
> @@ -3312,6 +3312,19 @@ unsigned int arm_excp_target_el(CPUState *cs, unsigned int excp_idx)
> target_el = 2;
> }
> break;
> + case EXCP_FIQ:
> + case EXCP_IRQ: {
A trivial style nit, but I prefer the { to go on its own line when
opening a new scope for a case statement like this.
> + const uint64_t hcr_mask = excp_idx == EXCP_FIQ ? HCR_FMO : HCR_IMO;
> + const uint32_t scr_mask = excp_idx == EXCP_FIQ ? SCR_FIQ : SCR_IRQ;
> +
> + if (!secure && (env->cp15.hcr_el2 & hcr_mask)) {
> + target_el = 2;
> + }
> + if (env->cp15.scr_el3 & scr_mask) {
> + target_el = 3;
> + }
> + break;
> + }
> }
> return target_el;
> }
thanks
-- PMM
next prev parent reply other threads:[~2014-08-01 14:28 UTC|newest]
Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-06-17 8:45 [Qemu-devel] [PATCH v3 00/16] target-arm: Parts of the AArch64 EL2/3 exception model Edgar E. Iglesias
2014-06-17 8:45 ` [Qemu-devel] [PATCH v3 01/16] target-arm: A64: Break out aarch64_save/restore_sp Edgar E. Iglesias
2014-06-17 8:45 ` [Qemu-devel] [PATCH v3 02/16] target-arm: A64: Respect SPSEL in ERET SP restore Edgar E. Iglesias
2014-06-17 8:45 ` [Qemu-devel] [PATCH v3 03/16] target-arm: A64: Respect SPSEL when taking exceptions Edgar E. Iglesias
2014-06-17 8:45 ` [Qemu-devel] [PATCH v3 04/16] target-arm: Make far_el1 an array Edgar E. Iglesias
2014-06-17 8:45 ` [Qemu-devel] [PATCH v3 05/16] target-arm: Add ESR_EL2 and 3 Edgar E. Iglesias
2014-06-17 8:45 ` [Qemu-devel] [PATCH v3 06/16] target-arm: Add FAR_EL2 " Edgar E. Iglesias
2014-06-17 8:45 ` [Qemu-devel] [PATCH v3 07/16] target-arm: Add HCR_EL2 Edgar E. Iglesias
2014-06-23 14:03 ` Greg Bellows
2014-08-01 13:29 ` Peter Maydell
2014-08-04 3:48 ` Edgar E. Iglesias
2014-08-04 4:00 ` Edgar E. Iglesias
2014-06-17 8:45 ` [Qemu-devel] [PATCH v3 08/16] target-arm: Add SCR_EL3 Edgar E. Iglesias
2014-06-23 14:15 ` Greg Bellows
2014-08-01 13:34 ` Peter Maydell
2014-08-04 15:19 ` Edgar E. Iglesias
2014-08-13 14:48 ` Greg Bellows
2014-08-18 3:24 ` Edgar E. Iglesias
2014-06-17 8:45 ` [Qemu-devel] [PATCH v3 09/16] target-arm: A64: Refactor aarch64_cpu_do_interrupt Edgar E. Iglesias
2014-08-01 14:33 ` Peter Maydell
2014-06-17 8:45 ` [Qemu-devel] [PATCH v3 10/16] target-arm: Break out exception masking to a separate func Edgar E. Iglesias
2014-08-01 13:51 ` Peter Maydell
2014-08-04 1:57 ` Edgar E. Iglesias
2014-06-17 8:45 ` [Qemu-devel] [PATCH v3 11/16] target-arm: Don't take interrupts targeting lower ELs Edgar E. Iglesias
2014-08-01 14:33 ` Peter Maydell
2014-06-17 8:45 ` [Qemu-devel] [PATCH v3 12/16] target-arm: A64: Correct updates to FAR and ESR on exceptions Edgar E. Iglesias
2014-08-01 13:56 ` Peter Maydell
2014-08-04 4:02 ` Edgar E. Iglesias
2014-06-17 8:45 ` [Qemu-devel] [PATCH v3 13/16] target-arm: A64: Emulate the HVC insn Edgar E. Iglesias
2014-08-01 14:21 ` Peter Maydell
2014-08-04 4:12 ` Edgar E. Iglesias
2014-08-04 14:24 ` Peter Maydell
2014-08-04 15:15 ` Edgar E. Iglesias
2014-06-17 8:45 ` [Qemu-devel] [PATCH v3 14/16] target-arm: A64: Emulate the SMC insn Edgar E. Iglesias
2014-06-23 14:29 ` Greg Bellows
2014-08-01 14:23 ` Peter Maydell
2014-06-17 8:45 ` [Qemu-devel] [PATCH v3 15/16] target-arm: Add IRQ and FIQ routing to EL2 and 3 Edgar E. Iglesias
2014-08-01 14:27 ` Peter Maydell [this message]
2014-08-04 4:13 ` Edgar E. Iglesias
2014-06-17 8:45 ` [Qemu-devel] [PATCH v3 16/16] target-arm: Add support for VIRQ and VFIQ Edgar E. Iglesias
2014-08-01 14:32 ` Peter Maydell
2014-08-04 5:00 ` Edgar E. Iglesias
2014-06-23 16:12 ` [Qemu-devel] [PATCH v3 00/16] target-arm: Parts of the AArch64 EL2/3 exception model Greg Bellows
2014-07-10 23:17 ` Edgar E. Iglesias
2014-07-11 9:00 ` Peter Maydell
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