From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:41247) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Rq4cu-00082W-Dv for qemu-devel@nongnu.org; Wed, 25 Jan 2012 10:19:12 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Rq4co-0004KX-3O for qemu-devel@nongnu.org; Wed, 25 Jan 2012 10:19:08 -0500 Received: from mail-qw0-f45.google.com ([209.85.216.45]:39039) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Rq4co-0004KP-1A for qemu-devel@nongnu.org; Wed, 25 Jan 2012 10:19:02 -0500 Received: by qabg40 with SMTP id g40so836777qab.4 for ; Wed, 25 Jan 2012 07:19:01 -0800 (PST) MIME-Version: 1.0 In-Reply-To: References: Date: Wed, 25 Jan 2012 15:19:01 +0000 Message-ID: From: Peter Maydell Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] TCG register allocator List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Xin Tong Cc: qemu-devel On 25 January 2012 14:24, Xin Tong wrote: > I am wondering how tcg reg alloc works. Specifically, how do i reserve > a register only for one specific purpose. R14 on tcg i386 is reserved > to point to the cpustate strcuture. =C2=A0it is assigned in the prologue, > but what code makes sure that it is not clobbered in the middle of a > TB ? target-i386/translate.c:optimize_flags_init() calls: cpu_env =3D tcg_global_reg_new_ptr(TCG_AREG0, "env"); which tells TCG that this register always has this value in it. TCG will then ensure that it doesn't try to use that register when it's doing allocation later. This is done by having tcg_global_reg_new_internal() call: tcg_regset_set_reg(s->reserved_regs, reg); We also add a register to the reserved_regs set in tcg/i386/tcg-target.c: tcg_target_init(): tcg_regset_set_reg(s->reserved_regs, TCG_REG_CALL_STACK); because attempting to allocate a value into ESP would be a bad idea :-) -- PMM