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From: Peter Maydell <peter.maydell@linaro.org>
To: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: qemu-devel@nongnu.org, qemu-arm@nongnu.org,
	"Radoslaw Biernacki" <rad@semihalf.com>,
	"Marcin Juszkiewicz" <marcin.juszkiewicz@linaro.org>,
	"Philippe Mathieu-Daudé" <philmd@linaro.org>
Subject: Re: [PATCH v2 0/3] Refactor PPI logic/definitions for virt/sbsa-ref
Date: Tue, 17 Oct 2023 12:53:30 +0100	[thread overview]
Message-ID: <CAFEAcA8_05mkFSqsA7NR3dP3UYqF3h0O6_SEEn_7N90FcKCQ1Q@mail.gmail.com> (raw)
In-Reply-To: <20230919090229.188092-1-quic_llindhol@quicinc.com>

On Tue, 19 Sept 2023 at 10:02, Leif Lindholm <quic_llindhol@quicinc.com> wrote:
>
> This set reworks the handling of private peripheral interrupts in virt
> to use INTIDs instead of PPI IDs, to make it easier to cross reference
> against Arm's Base System Architecture specification.
>
> It then breaks those definitions out into a separate header and switches
> sbsa-ref to use the same header instead of defining its own values
> locally.

I've applied these patches, with a few tweaks to patch 2:
 * the macro PPI_TO_INTID is unused, so I dropped it
 * I sorted the defines into numerical order
 * I added ARCH_TIMER_NS_EL2_VIRT_IRQ, which fixes up a
   minor conflict with the recent sbsa-ref change which added
   use of that IRQ

Applied to target-arm.next, thanks.

-- PMM


      parent reply	other threads:[~2023-10-17 11:55 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-09-19  9:02 [PATCH v2 0/3] Refactor PPI logic/definitions for virt/sbsa-ref Leif Lindholm
2023-09-19  9:02 ` [PATCH v2 1/3] {include/}hw/arm: refactor virt PPI logic Leif Lindholm
2023-09-19  9:02 ` [PATCH v2 2/3] include/hw/arm: move BSA definitions to bsa.h Leif Lindholm
2023-09-19  9:02 ` [PATCH v2 3/3] hw/arm/sbsa-ref: use bsa.h for PPI definitions Leif Lindholm
2023-10-17 11:53 ` Peter Maydell [this message]

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