From: Peter Maydell <peter.maydell@linaro.org>
To: Jinjie Ruan <ruanjinjie@huawei.com>
Cc: eduardo@habkost.net, marcel.apfelbaum@gmail.com,
philmd@linaro.org, wangyanan55@huawei.com,
richard.henderson@linaro.org, qemu-devel@nongnu.org,
qemu-arm@nongnu.org
Subject: Re: [RFC PATCH v8 09/23] target/arm: Handle PSTATE.ALLINT on taking an exception
Date: Tue, 19 Mar 2024 16:47:21 +0000 [thread overview]
Message-ID: <CAFEAcA8_2U6bydhixx+j84FUBY3tT5rN8Y4c6KHGjbbAX+1v3Q@mail.gmail.com> (raw)
In-Reply-To: <20240318093546.2786144-10-ruanjinjie@huawei.com>
On Mon, 18 Mar 2024 at 09:37, Jinjie Ruan <ruanjinjie@huawei.com> wrote:
>
> Set or clear PSTATE.ALLINT on taking an exception to ELx according to the
> SCTLR_ELx.SPINTMASK bit.
>
> Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com>
> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> v3:
> - Add Reviewed-by.
> ---
> target/arm/helper.c | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
> diff --git a/target/arm/helper.c b/target/arm/helper.c
> index 4bc63bf7ca..81f4a8f194 100644
> --- a/target/arm/helper.c
> +++ b/target/arm/helper.c
> @@ -11705,6 +11705,15 @@ static void arm_cpu_do_interrupt_aarch64(CPUState *cs)
> }
> }
>
> + if (cpu_isar_feature(aa64_nmi, cpu) &&
> + (env->cp15.sctlr_el[new_el] & SCTLR_NMI)) {
This shouldn't be checking the value of SCTLR_NMI here:
the new PSTATE.ALLINT is set to !SPINTMASK even if NMI == 0.
(The SPINTMASK bit description is a bit confusing, but
the correct behaviour is clear in the AArch64.TakeException()
pseudocode.)
> + if (!(env->cp15.sctlr_el[new_el] & SCTLR_SPINTMASK)) {
> + new_mode |= PSTATE_ALLINT;
> + } else {
> + new_mode &= ~PSTATE_ALLINT;
> + }
> + }
> +
> pstate_write(env, PSTATE_DAIF | new_mode);
> env->aarch64 = true;
> aarch64_restore_sp(env, new_el);
> --
> 2.34.1
>
thanks
-- PMM
next prev parent reply other threads:[~2024-03-19 16:48 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-03-18 9:35 [RFC PATCH v8 00/23] target/arm: Implement FEAT_NMI and FEAT_GICv3_NMI Jinjie Ruan via
2024-03-18 9:35 ` [RFC PATCH v8 01/23] target/arm: Handle HCR_EL2 accesses for bits introduced with FEAT_NMI Jinjie Ruan via
2024-03-18 9:35 ` [RFC PATCH v8 02/23] target/arm: Add PSTATE.ALLINT Jinjie Ruan via
2024-03-18 9:35 ` [RFC PATCH v8 03/23] target/arm: Add support for FEAT_NMI, Non-maskable Interrupt Jinjie Ruan via
2024-03-18 9:35 ` [RFC PATCH v8 04/23] target/arm: Implement ALLINT MSR (immediate) Jinjie Ruan via
2024-03-18 9:35 ` [RFC PATCH v8 05/23] target/arm: Support MSR access to ALLINT Jinjie Ruan via
2024-03-19 16:45 ` Peter Maydell
2024-03-20 3:13 ` Jinjie Ruan via
2024-03-19 17:30 ` Peter Maydell
2024-03-20 3:21 ` Jinjie Ruan via
2024-03-18 9:35 ` [RFC PATCH v8 06/23] target/arm: Add support for Non-maskable Interrupt Jinjie Ruan via
2024-03-19 17:28 ` Peter Maydell
2024-03-19 18:51 ` Richard Henderson
2024-03-19 19:26 ` Peter Maydell
2024-03-20 9:49 ` Jinjie Ruan via
2024-03-21 9:26 ` Jinjie Ruan via
2024-03-21 9:59 ` Peter Maydell
2024-03-21 11:41 ` Peter Maydell
2024-03-18 9:35 ` [RFC PATCH v8 07/23] target/arm: Add support for NMI in arm_phys_excp_target_el() Jinjie Ruan via
2024-03-18 9:35 ` [RFC PATCH v8 08/23] target/arm: Handle IS/FS in ISR_EL1 for NMI Jinjie Ruan via
2024-03-18 9:35 ` [RFC PATCH v8 09/23] target/arm: Handle PSTATE.ALLINT on taking an exception Jinjie Ruan via
2024-03-19 16:47 ` Peter Maydell [this message]
2024-03-28 8:56 ` Jinjie Ruan via
2024-03-28 10:46 ` Peter Maydell
2024-03-18 9:35 ` [RFC PATCH v8 10/23] hw/arm/virt: Wire NMI and VNMI irq lines from GIC to CPU Jinjie Ruan via
2024-03-18 9:35 ` [RFC PATCH v8 11/23] hw/intc/arm_gicv3: Add external IRQ lines for NMI Jinjie Ruan via
2024-03-18 9:35 ` [RFC PATCH v8 12/23] target/arm: Handle NMI in arm_cpu_do_interrupt_aarch64() Jinjie Ruan via
2024-03-18 9:35 ` [RFC PATCH v8 13/23] hw/intc/arm_gicv3: Add irq superpriority information Jinjie Ruan via
2024-03-21 13:17 ` Peter Maydell
2024-03-22 2:54 ` Jinjie Ruan via
2024-03-18 9:35 ` [RFC PATCH v8 14/23] hw/intc/arm_gicv3_redist: Implement GICR_INMIR0 Jinjie Ruan via
2024-03-18 9:35 ` [RFC PATCH v8 15/23] hw/intc/arm_gicv3: Implement GICD_INMIR Jinjie Ruan via
2024-03-18 9:35 ` [RFC PATCH v8 16/23] hw/intc: Enable FEAT_GICv3_NMI Feature Jinjie Ruan via
2024-03-18 9:35 ` [RFC PATCH v8 17/23] hw/intc/arm_gicv3: Add NMI handling CPU interface registers Jinjie Ruan via
2024-03-18 9:35 ` [RFC PATCH v8 18/23] hw/intc/arm_gicv3: Handle icv_nmiar1_read() for icc_nmiar1_read() Jinjie Ruan via
2024-03-18 9:35 ` [RFC PATCH v8 19/23] hw/intc/arm_gicv3: Implement NMI interrupt prioirty Jinjie Ruan via
2024-03-18 9:35 ` [RFC PATCH v8 20/23] hw/intc/arm_gicv3: Report the NMI interrupt in gicv3_cpuif_update() Jinjie Ruan via
2024-03-18 9:35 ` [RFC PATCH v8 21/23] hw/intc/arm_gicv3: Report the VNMI interrupt Jinjie Ruan via
2024-03-18 9:35 ` [RFC PATCH v8 22/23] target/arm: Add FEAT_NMI to max Jinjie Ruan via
2024-03-18 9:35 ` [RFC PATCH v8 23/23] hw/arm/virt: Add FEAT_GICv3_NMI feature support in virt GIC Jinjie Ruan via
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