From: Peter Maydell <peter.maydell@linaro.org>
To: Mark Langsdorf <mark.langsdorf@calxeda.com>
Cc: qemu-devel@nongnu.org, rob.herring@calxeda.com, afaerber@suse.de
Subject: Re: [Qemu-devel] [PATCH v5 5/5] add L2x0/PL310 cache controller device
Date: Wed, 4 Jan 2012 13:29:06 +0000 [thread overview]
Message-ID: <CAFEAcA8af1fn-UQFGxBDVO8mgG7Y8FH9LR-VHyjTCAyVaXhf5A@mail.gmail.com> (raw)
In-Reply-To: <1325175596-5807-6-git-send-email-mark.langsdorf@calxeda.com>
On 29 December 2011 16:19, Mark Langsdorf <mark.langsdorf@calxeda.com> wrote:
> From: Rob Herring <rob.herring@calxeda.com>
>
> This is just a dummy device for ARM L2 cache controllers, based on the
> pl310. The cache type parameter can be defined by a property value
> and has a meaningful default.
>
> Signed-off-by: Rob Herring <rob.herring@calxeda.com>
> Signed-off-by: Mark Langsdorf <mark.langsdorf@calxeda.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
(well, it has a stray blank line at the end, but I'll just zap that when I put
it into arm-devs.next.)
I'll put together the simple patches that add the cache controller to vexpress
and realview shortly.
-- PMM
next prev parent reply other threads:[~2012-01-04 13:29 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-12-29 16:19 [Qemu-devel] [PATCH v5 0/7] various ARM fixes for Calxeda Highbank Mark Langsdorf
2011-12-29 16:19 ` [Qemu-devel] [PATCH v5 1/7] arm: add missing scu registers Mark Langsdorf
2011-12-29 16:19 ` [Qemu-devel] [PATCH v5 2/7] arm: Set frequencies for arm_timer Mark Langsdorf
2011-12-29 16:19 ` [Qemu-devel] [PATCH v5 3/7] arm: add dummy v7 cp15 config_base_register Mark Langsdorf
2012-01-04 14:32 ` Peter Maydell
2012-01-04 16:32 ` Mark Langsdorf
2012-01-04 16:47 ` Peter Maydell
2012-01-04 16:53 ` [Qemu-devel] [PATCH v6 1/1] arm: add dummy v7 cp15 registers Mark Langsdorf
2012-01-04 17:50 ` Peter Maydell
2012-01-04 18:23 ` Mark Langsdorf
2012-01-04 19:07 ` [Qemu-devel] [PATCH v7] " Mark Langsdorf
2012-01-04 23:50 ` Peter Maydell
2012-01-05 0:14 ` [Qemu-devel] [PATCH v8] " Mark Langsdorf
2012-01-05 0:22 ` Peter Maydell
2012-01-05 0:54 ` Mark Langsdorf
2012-01-05 8:36 ` Peter Maydell
2012-01-05 13:16 ` [Qemu-devel] [PATCH v9] " Mark Langsdorf
2012-01-05 15:33 ` Peter Maydell
2012-01-05 15:34 ` Mark Langsdorf
2011-12-29 16:19 ` [Qemu-devel] [PATCH v5 4/7] arm: add dummy gic security registers Mark Langsdorf
2011-12-29 16:19 ` [Qemu-devel] [PATCH v5 5/5] add L2x0/PL310 cache controller device Mark Langsdorf
2012-01-04 13:29 ` Peter Maydell [this message]
2012-06-07 13:45 ` Andreas Färber
2012-06-07 14:21 ` Mark Langsdorf
2011-12-29 16:19 ` [Qemu-devel] [PATCH v5 6/7] Add xgmac ethernet model Mark Langsdorf
2011-12-29 16:19 ` [Qemu-devel] [PATCH v5 7/7] arm: make the number of GIC interrupts configurable Mark Langsdorf
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=CAFEAcA8af1fn-UQFGxBDVO8mgG7Y8FH9LR-VHyjTCAyVaXhf5A@mail.gmail.com \
--to=peter.maydell@linaro.org \
--cc=afaerber@suse.de \
--cc=mark.langsdorf@calxeda.com \
--cc=qemu-devel@nongnu.org \
--cc=rob.herring@calxeda.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).