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From: Peter Maydell <peter.maydell@linaro.org>
To: Shannon Zhao <shannon.zhao@linaro.org>
Cc: Peter Crosthwaite <peter.crosthwaite@xilinx.com>,
	"qemu-devel@nongnu.org Developers" <qemu-devel@nongnu.org>,
	Shannon Zhao <zhaoshenglong@huawei.com>
Subject: Re: [Qemu-devel] [PATCH 1/2] target-arm/kvm64: Add cortex-a53 cpu support
Date: Mon, 1 Jun 2015 15:27:45 +0100	[thread overview]
Message-ID: <CAFEAcA8bfcOADjOEEZWobnUwtA5aTmEnCw3t0QCRVfOY2in3Dw@mail.gmail.com> (raw)
In-Reply-To: <556C54B5.7050903@linaro.org>

On 1 June 2015 at 13:48, Shannon Zhao <shannon.zhao@linaro.org> wrote:
>
>
> On 2015/6/1 18:54, Peter Crosthwaite wrote:
>>
>> On Mon, Jun 1, 2015 at 3:34 AM,  <shannon.zhao@linaro.org> wrote:
>>>
>>> From: Shannon Zhao <shannon.zhao@linaro.org>
>>>
>>
>> Say more about the changes. Why the gap to index 4?
>>
> You mean why the KVM_ARM_TARGET_CORTEX_A53 is 4?
>
> linux-headers/asm-arm64/kvm.h defines it to 4.
>
> /* Supported Processor Types */
> #define KVM_ARM_TARGET_AEM_V8           0
> #define KVM_ARM_TARGET_FOUNDATION_V8    1
> #define KVM_ARM_TARGET_CORTEX_A57       2
> #define KVM_ARM_TARGET_XGENE_POTENZA    3
> #define KVM_ARM_TARGET_CORTEX_A53       4

I think it would make more sense to include the XGENE_POTENZA
in the enum too; we already have a few in the list (AEM,
FOUNDATION_V8) which we don't have QEMU support for.
That way there isn't a confusing gap in the enumeration.

thanks
-- PMM

  reply	other threads:[~2015-06-01 14:28 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-06-01 10:34 [Qemu-devel] [PATCH 0/2] Add cortex-a53 cpu support for kvm-arm and virt shannon.zhao
2015-06-01 10:34 ` [Qemu-devel] [PATCH 1/2] target-arm/kvm64: Add cortex-a53 cpu support shannon.zhao
2015-06-01 10:54   ` Peter Crosthwaite
2015-06-01 12:48     ` Shannon Zhao
2015-06-01 14:27       ` Peter Maydell [this message]
2015-06-01 10:34 ` [Qemu-devel] [PATCH 2/2] hw/arm/virt: Add cortex-a53 cpu support in machine virt shannon.zhao
2015-06-01 17:25   ` Peter Maydell

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