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From: Peter Maydell <peter.maydell@linaro.org>
To: Luc Michel <luc.michel@amd.com>
Cc: qemu-devel@nongnu.org, qemu-arm@nongnu.org,
	"Francisco Iglesias" <francisco.iglesias@amd.com>,
	"Edgar E . Iglesias" <edgar.iglesias@amd.com>,
	"Philippe Mathieu-Daudé" <philmd@linaro.org>,
	"Alistair Francis" <alistair@alistair23.me>,
	"Frederic Konrad" <frederic.konrad@amd.com>,
	"Sai Pavan Boddu" <sai.pavan.boddu@amd.com>
Subject: Re: [PATCH 13/48] hw/arm/xlnx-versal: VersalMap: add support for OR'ed IRQs
Date: Tue, 19 Aug 2025 16:25:48 +0100	[thread overview]
Message-ID: <CAFEAcA8eop95ojfZw3YbDrWfrv1fZ5QYSmwx_oDThxMCiMMeDg@mail.gmail.com> (raw)
In-Reply-To: <aKMrBdNhtqHVHRYw@XFR-LUMICHEL-L2.amd.com>

On Mon, 18 Aug 2025 at 14:30, Luc Michel <luc.michel@amd.com> wrote:
>
> Hi Peter,
>
> On 13:24 Mon 04 Aug     , Peter Maydell wrote:
> > On Wed, 16 Jul 2025 at 10:55, Luc Michel <luc.michel@amd.com> wrote:
> > >
> > > +static qemu_irq versal_get_irq_or_gate_in(Versal *s, int irq_idx,
> > > +                                          qemu_irq target_irq)
> > > +{
> > > +    Object *container = versal_get_child(s, "irq-or-gates");
> > > +    DeviceState *dev;
> > > +    g_autofree char *name;
> > > +    int idx, or_idx;
> > > +
> > > +    idx = FIELD_EX32(irq_idx, VERSAL_IRQ, IRQ);
> > > +    or_idx = FIELD_EX32(irq_idx, VERSAL_IRQ, OR_IDX);
> > > +
> > > +    name = g_strdup_printf("irq[%d]", idx);
> > > +    dev = DEVICE(object_resolve_path_at(container, name));
> > > +
> > > +    if (dev == NULL) {
> > > +        dev = qdev_new(TYPE_OR_IRQ);
> >
> > Here we create a device...
> >
> > > +        object_property_add_child(container, name, OBJECT(dev));
> > > +        qdev_prop_set_uint16(dev, "num-lines", 1 << R_VERSAL_IRQ_OR_IDX_LENGTH);
> > > +        qdev_realize_and_unref(dev, NULL, &error_abort);
> > > +        qdev_connect_gpio_out(dev, 0, target_irq);
> > > +    }
> > > +
> > > +    return qdev_get_gpio_in(dev, or_idx);
> >
> > ...but then we don't save the pointer to it, so the only
> > thing still hanging onto it is the QOM tree.
> >
> > If you want to change "embedded device struct" into
> > "allocate memory to create devices" that's fine, but the
> > SoC should still keep track of everything it's creating,
> > so that (at least in theory) it could clean it up on
> > unrealize.
>
> I'm not sure I fully understand your point:
>
>    - The OR gate device is parented to the "irq-or-gates" container,
>      which is itself parented to the SoC. So finalizing (freeing) the
>      SoC would trigger a cascade of free calls to the children,
>      including those objects right?

Ah, I hadn't noticed that we add the object as a QOM child
of the SoC here.

It does mean you can't ever get back to the OR gate object
except by walking the QOM tree, but I suppose that's OK.

It would be helpful if you could run "make check" under
the clang leak sanitizer with your patches added, to see
if it complains about anything. (Unfortunately it will
definitely complain about at least some pre-existing
leaks, I suspect.)

thanks
-- PMM


  reply	other threads:[~2025-08-19 15:26 UTC|newest]

Thread overview: 106+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-07-16  9:53 [PATCH 00/48] AMD Versal Gen 2 support Luc Michel
2025-07-16  9:53 ` [PATCH 01/48] hw/net/cadence_gem: fix register mask initialization Luc Michel
2025-07-24  8:30   ` Francisco Iglesias
2025-07-28  8:47   ` Boddu, Sai Pavan
2025-07-16  9:53 ` [PATCH 02/48] hw/arm/xlnx-versal: split the xlnx-versal type Luc Michel
2025-07-28 16:59   ` Francisco Iglesias
2025-07-16  9:53 ` [PATCH 03/48] hw/arm/xlnx-versal: prepare for FDT creation Luc Michel
2025-07-28 17:13   ` Francisco Iglesias
2025-07-16  9:53 ` [PATCH 04/48] hw/arm/xlnx-versal: uart: refactor creation Luc Michel
2025-07-28 17:29   ` Francisco Iglesias
2025-07-16  9:53 ` [PATCH 05/48] hw/arm/xlnx-versal: canfd: " Luc Michel
2025-07-28 20:44   ` Francisco Iglesias
2025-07-16  9:53 ` [PATCH 06/48] hw/arm/xlnx-versal: sdhci: " Luc Michel
2025-07-28 20:50   ` Francisco Iglesias
2025-07-16  9:53 ` [PATCH 07/48] hw/arm/xlnx-versal: gem: " Luc Michel
2025-07-28 20:56   ` Francisco Iglesias
2025-07-16  9:53 ` [PATCH 08/48] hw/arm/xlnx-versal: adma: " Luc Michel
2025-07-28 21:02   ` Francisco Iglesias
2025-07-16  9:53 ` [PATCH 09/48] hw/arm/xlnx-versal: xram: " Luc Michel
2025-07-28 21:05   ` Francisco Iglesias
2025-07-16  9:53 ` [PATCH 10/48] hw/arm/xlnx-versal: usb: " Luc Michel
2025-07-28 21:13   ` Francisco Iglesias
2025-07-16  9:53 ` [PATCH 11/48] hw/arm/xlnx-versal: efuse: " Luc Michel
2025-07-29 13:25   ` Francisco Iglesias
2025-07-16  9:53 ` [PATCH 12/48] hw/arm/xlnx-versal: ospi: " Luc Michel
2025-07-29 13:34   ` Francisco Iglesias
2025-07-16  9:53 ` [PATCH 13/48] hw/arm/xlnx-versal: VersalMap: add support for OR'ed IRQs Luc Michel
2025-07-29 13:42   ` Francisco Iglesias
2025-08-04 12:24   ` Peter Maydell
2025-08-18 13:30     ` Luc Michel
2025-08-19 15:25       ` Peter Maydell [this message]
2025-08-20  7:18         ` Luc Michel
2025-08-21 13:55           ` Peter Maydell
2025-08-22 15:19             ` Luc Michel
2025-08-22 15:41               ` Peter Maydell
2025-07-16  9:53 ` [PATCH 14/48] hw/arm/xlnx-versal: PMC IOU SCLR: refactor creation Luc Michel
2025-07-29 19:41   ` Francisco Iglesias
2025-07-16  9:53 ` [PATCH 15/48] hw/arm/xlnx-versal: bbram: " Luc Michel
2025-07-29 19:48   ` Francisco Iglesias
2025-07-16  9:53 ` [PATCH 16/48] hw/arm/xlnx-versal: trng: " Luc Michel
2025-07-29 19:50   ` Francisco Iglesias
2025-07-16  9:53 ` [PATCH 17/48] hw/arm/xlnx-versal: rtc: " Luc Michel
2025-07-29 19:54   ` Francisco Iglesias
2025-07-16  9:54 ` [PATCH 18/48] hw/arm/xlnx-versal: cfu: " Luc Michel
2025-07-29 19:58   ` Francisco Iglesias
2025-07-16  9:54 ` [PATCH 19/48] hw/arm/xlnx-versal: crl: " Luc Michel
2025-07-29 20:00   ` Francisco Iglesias
2025-07-16  9:54 ` [PATCH 20/48] hw/arm/xlnx-versal-virt: virtio: " Luc Michel
2025-07-29 20:04   ` Francisco Iglesias
2025-07-16  9:54 ` [PATCH 21/48] hw/arm/xlnx-versal: refactor CPU cluster creation Luc Michel
2025-07-29 20:13   ` Francisco Iglesias
2025-07-16  9:54 ` [PATCH 22/48] hw/arm/xlnx-versal: add the mp_affinity property to the CPU mapping Luc Michel
2025-07-29 20:15   ` Francisco Iglesias
2025-07-16  9:54 ` [PATCH 23/48] hw/arm/xlnx-versal: instantiate the GIC ITS in the APU Luc Michel
2025-07-29 20:16   ` Francisco Iglesias
2025-07-16  9:54 ` [PATCH 24/48] hw/intc/arm_gicv3: Introduce a 'first-cpu-index' property Luc Michel
2025-08-04 12:33   ` Peter Maydell
2025-07-16  9:54 ` [PATCH 25/48] hw/arm/xlnx-versal: add support for multiple GICs Luc Michel
2025-07-30 14:26   ` Francisco Iglesias
2025-07-16  9:54 ` [PATCH 26/48] hw/arm/xlnx-versal: add support for GICv2 Luc Michel
2025-07-30 14:29   ` Francisco Iglesias
2025-07-16  9:54 ` [PATCH 27/48] hw/arm/xlnx-versal: rpu: refactor creation Luc Michel
2025-07-30 19:03   ` Francisco Iglesias
2025-07-16  9:54 ` [PATCH 28/48] hw/arm/xlnx-versal: ocm: " Luc Michel
2025-07-30 19:04   ` Francisco Iglesias
2025-07-16  9:54 ` [PATCH 29/48] hw/arm/xlnx-versal: ddr: " Luc Michel
2025-07-30 19:12   ` Francisco Iglesias
2025-07-16  9:54 ` [PATCH 30/48] hw/arm/xlnx-versal: add the versal_get_num_cpu accessor Luc Michel
2025-07-30 19:13   ` Francisco Iglesias
2025-07-16  9:54 ` [PATCH 31/48] hw/misc/xlnx-versal-crl: remove unnecessary include directives Luc Michel
2025-07-30 19:14   ` Francisco Iglesias
2025-07-16  9:54 ` [PATCH 32/48] hw/misc/xlnx-versal-crl: split into base/concrete classes Luc Michel
2025-07-30 19:23   ` Francisco Iglesias
2025-07-16  9:54 ` [PATCH 33/48] hw/misc/xlnx-versal-crl: refactor device reset logic Luc Michel
2025-07-31 13:23   ` Francisco Iglesias
2025-07-16  9:54 ` [PATCH 34/48] hw/arm/xlnx-versal: reconnect the CRL to the other devices Luc Michel
2025-07-31 13:26   ` Francisco Iglesias
2025-07-16  9:54 ` [PATCH 35/48] hw/arm/xlnx-versal: use hw/arm/bsa.h for timer IRQ indices Luc Michel
2025-07-31 13:29   ` Francisco Iglesias
2025-07-16  9:54 ` [PATCH 36/48] hw/arm/xlnx-versal: tidy up Luc Michel
2025-07-31 20:14   ` Francisco Iglesias
2025-07-16  9:54 ` [PATCH 37/48] hw/misc/xlnx-versal-crl: add the versal2 version Luc Michel
2025-07-31 20:19   ` Francisco Iglesias
2025-07-16  9:54 ` [PATCH 38/48] hw/arm/xlnx-versal: add a per_cluster_gic switch to VersalCpuClusterMap Luc Michel
2025-07-31 20:27   ` Francisco Iglesias
2025-07-16  9:54 ` [PATCH 39/48] hw/arm/xlnx-versal: add the target field in IRQ descriptor Luc Michel
2025-07-31 20:31   ` Francisco Iglesias
2025-07-16  9:54 ` [PATCH 40/48] target/arm/tcg/cpu64: add the cortex-a78ae CPU Luc Michel
2025-08-04 12:44   ` Peter Maydell
2025-08-04 18:44     ` Peter Maydell
2025-07-16  9:54 ` [PATCH 41/48] hw/arm/xlnx-versal: add versal2 SoC Luc Michel
2025-07-31 20:40   ` Francisco Iglesias
2025-07-16  9:54 ` [PATCH 42/48] hw/arm/xlnx-versal-virt: rename the machine to amd-versal-virt Luc Michel
2025-07-31 20:45   ` Francisco Iglesias
2025-07-16  9:54 ` [PATCH 43/48] hw/arm/xlnx-versal-virt: split into base/concrete classes Luc Michel
2025-07-31 21:00   ` Francisco Iglesias
2025-07-16  9:54 ` [PATCH 44/48] hw/arm/xlnx-versal-virt: tidy up Luc Michel
2025-07-31 21:00   ` Francisco Iglesias
2025-07-16  9:54 ` [PATCH 45/48] docs/system/arm/xlnx-versal-virt: update supported devices Luc Michel
2025-07-31 21:01   ` Francisco Iglesias
2025-07-16  9:54 ` [PATCH 46/48] docs/system/arm/xlnx-versal-virt: add a note about dumpdtb Luc Michel
2025-07-31 21:02   ` Francisco Iglesias
2025-07-16  9:54 ` [PATCH 47/48] hw/arm/xlnx-versal-virt: add the xlnx-versal2-virt machine Luc Michel
2025-07-31 21:08   ` Francisco Iglesias
2025-07-16  9:54 ` [PATCH 48/48] tests/functional/test_aarch64_xlnx_versal: test the versal2 machine Luc Michel
2025-07-31 21:09   ` Francisco Iglesias

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