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That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Aleksandar Rikalo , QEMU Developers , Aleksandar Markovic , Huacai Chen , Aurelien Jarno Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On Thu, 6 Aug 2020 at 21:31, Philippe Mathieu-Daud=C3=A9 = wrote: > > On 8/6/20 8:01 PM, Jiaxun Yang wrote: > > =E5=9C=A8 2020/8/6 =E4=B8=8B=E5=8D=888:26, Philippe Mathieu-Daud=C3=A9 = =E5=86=99=E9=81=93: > >> We only implement the Index[Store/Load]Tag from the 'cache' opcode. > >> Instead of ignoring the other cache operations, report them as > >> unimplemented. > > > > Hmm, I don't think we have anything to do with Invalidate/Writeback etc= . > > opcodes > > in QEMU. Why do we log this? > > I'm noticed this code is run on Linux 3.3.8 (4KEc): > > 8880: 3082000f andi v0,a0,0xf > 8884: 10800008 beqz a0,88a8 > 8888: 00a21021 addu v0,a1,v0 > 888c: 08002227 j 889c > 8890: 00001821 move v1,zero > 8894: bcf90000 cache 0x19,0(a3) > 8898: 24630010 addiu v1,v1,16 > 889c: 0062302b sltu a2,v1,v0 > 88a0: 14c0fffc bnez a2,8894 > 88a4: 00833821 addu a3,a0,v1 > 88a8: 03e00008 jr ra > 88ac: 00000000 nop > > Why silently ignore the opcode is not implemented instead of logging it? I think the question is whether the opcode is supposed to have some behaviour which we're not implementing, or whether "no-op" is the correct behaviour for it (which it usually is for cache invalidate type operations; compare the way the Arm cache ops like IC_IALLU are just ARM_CP_NOP ops). thanks -- PMM