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From: Peter Maydell <peter.maydell@linaro.org>
To: Richard Henderson <richard.henderson@linaro.org>
Cc: qemu-arm@nongnu.org, qemu-devel@nongnu.org
Subject: Re: [PATCH 2/2] target/arm: Define neoverse-v1
Date: Thu, 6 Jul 2023 13:29:35 +0100	[thread overview]
Message-ID: <CAFEAcA8itOZACU_MWTzZHUf0Nt64LBGcSLJ9Qry9xn4PCw2W+Q@mail.gmail.com> (raw)
In-Reply-To: <efed6e67-beb2-dc60-18c5-af0fe1431f0b@linaro.org>

On Wed, 5 Jul 2023 at 15:09, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> On 7/4/23 15:06, Peter Maydell wrote:
> > If you're checking the values against the TRM, note that the
> > summary tables differ from the register description in the TRM
> > for ID_AA64DFR0_EL1, ID_AA64ZFR0_EL1 and ID_PFR0_EL1: we
> > trust the versions in the register descriptions. Also the
> > MIDR value in the r1p2 TRM isn't updated from r1p1.
> > The CCSIDR_EL1 values in the TRM unfortunately seem to be wrong:
> > the comment in the patch describes how I've calculated the
> > values used here.
> ...
> > +    cpu->isar.id_aa64mmfr2 = 0x0000000000001011ull;
>
> I see 0x0220011102101011, not in your list of exceptions above.

Good catch -- I must have cut-and-pasted the neoverse-n1
code and then forgotten to update that value in it.

-- PMM


  reply	other threads:[~2023-07-06 12:30 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-07-04 13:06 [PATCH 0/2] target/arm: Implement Cortex Neoverse-V1 Peter Maydell
2023-07-04 13:06 ` [PATCH 1/2] target/arm: Suppress more TCG unimplemented features in ID registers Peter Maydell
2023-07-04 13:45   ` Alex Bennée
2023-07-05 13:52   ` Richard Henderson
2023-07-04 13:06 ` [PATCH 2/2] target/arm: Define neoverse-v1 Peter Maydell
2023-07-04 14:58   ` Alex Bennée
2023-07-05 14:09   ` Richard Henderson
2023-07-06 12:29     ` Peter Maydell [this message]
2023-07-04 13:35 ` [PATCH 0/2] target/arm: Implement Cortex Neoverse-V1 Marcin Juszkiewicz
2023-07-04 14:54   ` Philippe Mathieu-Daudé
2023-07-04 15:00     ` Marcin Juszkiewicz
2023-07-04 15:02       ` Philippe Mathieu-Daudé

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