From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:35156) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cEC6u-0000hD-AH for qemu-devel@nongnu.org; Tue, 06 Dec 2016 04:32:29 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cEC6q-0008Rm-9y for qemu-devel@nongnu.org; Tue, 06 Dec 2016 04:32:28 -0500 Received: from mail-ua0-f171.google.com ([209.85.217.171]:36828) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1cEC6p-0008RZ-SX for qemu-devel@nongnu.org; Tue, 06 Dec 2016 04:32:24 -0500 Received: by mail-ua0-f171.google.com with SMTP id b35so375220011uaa.3 for ; Tue, 06 Dec 2016 01:32:23 -0800 (PST) MIME-Version: 1.0 In-Reply-To: References: From: Peter Maydell Date: Tue, 6 Dec 2016 09:31:02 +0000 Message-ID: Content-Type: text/plain; charset=UTF-8 Subject: Re: [Qemu-devel] [PATCH for 2.8 v3 1/1] cadence_uart: Check baud rate generator and divider values on migration List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Alistair Francis Cc: QEMU Developers , Alistair Francis , Prasad J Pandit , Huawei PSIRT On 5 December 2016 at 18:35, Alistair Francis wrote: > The Cadence UART device emulator calculates speed by dividing the > baud rate by a 'baud rate generator' & 'baud rate divider' value. > The device specification defines these register values to be > non-zero and within certain limits. Checks were recently added when > writing to these registers but not when restoring from migration. > > This patch adds checks when restoring from migration to avoid divide by > zero errors. > > Reported-by: Huawei PSIRT > Signed-off-by: Alistair Francis > --- > It would be nice to squeeze this into 2.8 if possible. > > V3: > - Fix broken migration logic > - Manually double checked and it passes migration. > V2: > - Abort the migration if the data is invalid > > hw/char/cadence_uart.c | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/hw/char/cadence_uart.c b/hw/char/cadence_uart.c > index 0215d65..ce9063b 100644 > --- a/hw/char/cadence_uart.c > +++ b/hw/char/cadence_uart.c > @@ -502,6 +502,13 @@ static int cadence_uart_post_load(void *opaque, int version_id) > { > CadenceUARTState *s = opaque; > > + /* Ensure these two aren't invalid numbers */ > + if (s->r[R_BRGR] <= 1 || s->r[R_BRGR] & ~0xFFFF || > + s->r[R_BDIV] <= 3 || s->r[R_BDIV] & ~0xFF) { The uart_write() code says BRGR == 1 is valid, but this code says it isn't. Which is correct? thanks -- PMM