qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: Peter Maydell <peter.maydell@linaro.org>
To: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
Cc: "Andrew.Yuan" <andrew.yuan@jaguarmicro.com>,
	philmd@linaro.org, alistair@alistair23.me,  jasowang@redhat.com,
	qemu-arm@nongnu.org, qemu-devel@nongnu.org
Subject: Re: [PATCH v3] hw/net: cadence_gem: feat: add logic for the DISABLE_MASK bit in type2_compare_x_word_1
Date: Tue, 4 Feb 2025 14:37:11 +0000	[thread overview]
Message-ID: <CAFEAcA8oaRVs8USMDGHvDW82AtRZGAhRCg189hhWtmRm2Y-YaQ@mail.gmail.com> (raw)
In-Reply-To: <CAJy5ezovedShKH=HFbK9uRY44no2ijQocs29CHLt2jKoNL+Vpw@mail.gmail.com>

On Thu, 30 Jan 2025 at 22:31, Edgar E. Iglesias
<edgar.iglesias@gmail.com> wrote:
> On Mon, Jan 27, 2025 at 8:40 AM Peter Maydell <peter.maydell@linaro.org> wrote:
>> On Thu, 19 Dec 2024 at 06:17, Andrew.Yuan <andrew.yuan@jaguarmicro.com> wrote:
>> > -            rx_cmp = rxbuf_ptr[offset] << 8 | rxbuf_ptr[offset];
>> > -            mask = FIELD_EX32(cr0, TYPE2_COMPARE_0_WORD_0, MASK_VALUE);
>> > -            compare = FIELD_EX32(cr0, TYPE2_COMPARE_0_WORD_0, COMPARE_VALUE);
>> > +            disable_mask =
>> > +                FIELD_EX32(cr1, TYPE2_COMPARE_0_WORD_1, DISABLE_MASK);
>> > +            if (disable_mask) {
>> > +                /*
>> > +                 * If disable_mask is set,
>> > +                 * mask_value is used as an additional 2 byte Compare Value.
>> > +                 * To simple, set mask = 0xFFFFFFFF, if disable_mask is set.
>> > +                 */
>> > +                rx_cmp = ldl_le_p(rxbuf_ptr + offset);
>> > +                mask = 0xFFFFFFFF;
>> > +                compare = cr0;
>> > +            } else {
>> > +                rx_cmp = lduw_le_p(rxbuf_ptr + offset);
>>
>> Is the change in behaviour in the !disable_mask codepath here
>> intentional? Previously we use one byte from rxbuf_ptr[offset],
>> duplicated into both halves of rx_cmp; now we will load two
>> different bytes from rxbuf_ptr[offset] and rxbuf_ptr[offset + 1].
>>
>> If this is intended, we should say so in the commit message.
>>
>
> I agree that it should be mentioned (looks like a correct bugfix).

Thanks. I've expanded the commit message:

    hw/net/cadence_gem:  Fix the mask/compare/disable-mask logic

    Our current handling of the mask/compare logic in the Cadence
    GEM ethernet device is wrong:
     (1) we load the same byte twice from rx_buf when
         creating the compare value
     (2) we ignore the DISABLE_MASK flag

    The "Cadence IP for Gigabit Ethernet MAC Part Number: IP7014 IP Rev:
    R1p12 - Doc Rev: 1.3 User Guide" states that if the DISABLE_MASK bit
    in type2_compare_x_word_1 is set, the mask_value field in
    type2_compare_x_word_0 is used as an additional 2 byte Compare Value.

    Correct these bugs:
     * in the !disable_mask codepath, use lduw_le_p() so we
       correctly load a 16-bit value for comparison
     * in the disable_mask codepath, we load a full 4-byte value
       from rx_buf for the comparison, set the compare value to
       the whole of the cr0 register (i.e. the concatenation of
       the mask and compare fields), and set mask to 0xffffffff
       to force a 32-bit comparison

and also tweaked the comment a bit:

+                /*
+                 * If disable_mask is set, mask_value is used as an
+                 * additional 2 byte Compare Value; that is equivalent
+                 * to using the whole cr0 register as the comparison value.
+                 * Load 32 bits of data from rx_buf, and set mask to
+                 * all-ones so we compare all 32 bits.
+                 */

and applied this to target-arm.next.

> Other than that this patch looks good to me!

Can I call that a Reviewed-by (with the above changes)?

thanks
-- PMM


  reply	other threads:[~2025-02-04 14:38 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-12-19  6:16 [PATCH v3] hw/net: cadence_gem: feat: add logic for the DISABLE_MASK bit in type2_compare_x_word_1 Andrew.Yuan
2025-01-27 14:40 ` Peter Maydell
2025-01-30 22:31   ` Edgar E. Iglesias
2025-02-04 14:37     ` Peter Maydell [this message]
2025-02-07  2:26       ` 答复: " andrew Yuan
2025-02-07  2:39       ` Edgar E. Iglesias
2025-02-10 10:44       ` Philippe Mathieu-Daudé

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=CAFEAcA8oaRVs8USMDGHvDW82AtRZGAhRCg189hhWtmRm2Y-YaQ@mail.gmail.com \
    --to=peter.maydell@linaro.org \
    --cc=alistair@alistair23.me \
    --cc=andrew.yuan@jaguarmicro.com \
    --cc=edgar.iglesias@gmail.com \
    --cc=jasowang@redhat.com \
    --cc=philmd@linaro.org \
    --cc=qemu-arm@nongnu.org \
    --cc=qemu-devel@nongnu.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).