* [PATCH] hw/arm/fsl-imx25: Fix a typo
@ 2020-10-02 8:09 Philippe Mathieu-Daudé
2020-10-08 10:46 ` Peter Maydell
0 siblings, 1 reply; 2+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-10-02 8:09 UTC (permalink / raw)
To: qemu-devel
Cc: qemu-trivial, Peter Maydell, qemu-arm,
Philippe Mathieu-Daudé, Jean-Christophe Dubois
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
include/hw/arm/fsl-imx25.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/hw/arm/fsl-imx25.h b/include/hw/arm/fsl-imx25.h
index 971f35dd16..c1603b2ac2 100644
--- a/include/hw/arm/fsl-imx25.h
+++ b/include/hw/arm/fsl-imx25.h
@@ -179,7 +179,7 @@ struct FslIMX25State {
* 0xBB00_0000 0xBB00_0FFF 4 Kbytes NAND flash main area buffer
* 0xBB00_1000 0xBB00_11FF 512 B NAND flash spare area buffer
* 0xBB00_1200 0xBB00_1DFF 3 Kbytes Reserved
- * 0xBB00_1E00 0xBB00_1FFF 512 B NAND flash control regisers
+ * 0xBB00_1E00 0xBB00_1FFF 512 B NAND flash control registers
* 0xBB01_2000 0xBFFF_FFFF 96 Mbytes (minus 8 Kbytes) Reserved
* 0xC000_0000 0xFFFF_FFFF 1024 Mbytes Reserved
*/
--
2.26.2
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH] hw/arm/fsl-imx25: Fix a typo
2020-10-02 8:09 [PATCH] hw/arm/fsl-imx25: Fix a typo Philippe Mathieu-Daudé
@ 2020-10-08 10:46 ` Peter Maydell
0 siblings, 0 replies; 2+ messages in thread
From: Peter Maydell @ 2020-10-08 10:46 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: QEMU Trivial, qemu-arm, QEMU Developers, Jean-Christophe Dubois
On Fri, 2 Oct 2020 at 09:09, Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> include/hw/arm/fsl-imx25.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/include/hw/arm/fsl-imx25.h b/include/hw/arm/fsl-imx25.h
> index 971f35dd16..c1603b2ac2 100644
> --- a/include/hw/arm/fsl-imx25.h
> +++ b/include/hw/arm/fsl-imx25.h
> @@ -179,7 +179,7 @@ struct FslIMX25State {
> * 0xBB00_0000 0xBB00_0FFF 4 Kbytes NAND flash main area buffer
> * 0xBB00_1000 0xBB00_11FF 512 B NAND flash spare area buffer
> * 0xBB00_1200 0xBB00_1DFF 3 Kbytes Reserved
> - * 0xBB00_1E00 0xBB00_1FFF 512 B NAND flash control regisers
> + * 0xBB00_1E00 0xBB00_1FFF 512 B NAND flash control registers
> * 0xBB01_2000 0xBFFF_FFFF 96 Mbytes (minus 8 Kbytes) Reserved
> * 0xC000_0000 0xFFFF_FFFF 1024 Mbytes Reserved
> */
Applied to target-arm.next, thanks.
-- PMM
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2020-10-08 10:46 ` Peter Maydell
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