From mboxrd@z Thu Jan  1 00:00:00 1970
Received: from eggs.gnu.org ([2001:4830:134:3::10]:34986)
	by lists.gnu.org with esmtp (Exim 4.71)
	(envelope-from <peter.maydell@linaro.org>) id 1YuQ8Y-0003AA-W0
	for qemu-devel@nongnu.org; Mon, 18 May 2015 14:51:40 -0400
Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)
	(envelope-from <peter.maydell@linaro.org>) id 1YuQ8U-0006jG-SV
	for qemu-devel@nongnu.org; Mon, 18 May 2015 14:51:38 -0400
Received: from mail-ie0-f182.google.com ([209.85.223.182]:35362)
	by eggs.gnu.org with esmtp (Exim 4.71)
	(envelope-from <peter.maydell@linaro.org>) id 1YuQ8U-0006jC-OP
	for qemu-devel@nongnu.org; Mon, 18 May 2015 14:51:34 -0400
Received: by iesa3 with SMTP id a3so90998666ies.2
	for <qemu-devel@nongnu.org>; Mon, 18 May 2015 11:51:34 -0700 (PDT)
MIME-Version: 1.0
In-Reply-To: <1431499963-1019-7-git-send-email-edgar.iglesias@gmail.com>
References: <1431499963-1019-1-git-send-email-edgar.iglesias@gmail.com>
	<1431499963-1019-7-git-send-email-edgar.iglesias@gmail.com>
From: Peter Maydell <peter.maydell@linaro.org>
Date: Mon, 18 May 2015 19:51:14 +0100
Message-ID: <CAFEAcA8vB5PALnch02rn=QPB917nhGYF2c1twLCw1+2pOh5rpg@mail.gmail.com>
Content-Type: text/plain; charset=UTF-8
Subject: Re: [Qemu-devel] [PATCH v1 06/18] target-arm: Add TCR_EL2
List-Id: <qemu-devel.nongnu.org>
List-Unsubscribe: <https://lists.nongnu.org/mailman/options/qemu-devel>,
	<mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>
List-Archive: <http://lists.nongnu.org/archive/html/qemu-devel>
List-Post: <mailto:qemu-devel@nongnu.org>
List-Help: <mailto:qemu-devel-request@nongnu.org?subject=help>
List-Subscribe: <https://lists.nongnu.org/mailman/listinfo/qemu-devel>,
	<mailto:qemu-devel-request@nongnu.org?subject=subscribe>
To: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
Cc: Edgar Iglesias <edgar.iglesias@xilinx.com>, Alexander Graf <agraf@suse.de>, QEMU Developers <qemu-devel@nongnu.org>, Greg Bellows <greg.bellows@linaro.org>, Sergey Fedorov <serge.fdrv@gmail.com>, =?UTF-8?B?QWxleCBCZW5uw6ll?= <alex.bennee@linaro.org>

On 13 May 2015 at 07:52, Edgar E. Iglesias <edgar.iglesias@gmail.com> wrote:
> From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>
>
> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
> ---
>  target-arm/helper.c | 9 +++++++++
>  1 file changed, 9 insertions(+)
>
> diff --git a/target-arm/helper.c b/target-arm/helper.c
> index 168549c..025e334 100644
> --- a/target-arm/helper.c
> +++ b/target-arm/helper.c
> @@ -2524,6 +2524,10 @@ static const ARMCPRegInfo v8_el3_no_el2_cp_reginfo[] = {
>        .opc0 = 3, .opc1 = 4, .crn = 10, .crm = 2, .opc2 = 0,
>        .access = PL2_RW,
>        .readfn = arm_cp_read_zero, .writefn = arm_cp_write_ignore },
> +    { .name = "TCR_EL2", .state = ARM_CP_STATE_AA64,
> +      .opc0 = 3, .opc1 = 4, .crn = 2, .crm = 0, .opc2 = 2,
> +      .access = PL2_RW,
> +      .readfn = arm_cp_read_zero, .writefn = arm_cp_write_ignore },
>      REGINFO_SENTINEL
>  };
>
> @@ -2603,6 +2607,11 @@ static const ARMCPRegInfo v8_el2_cp_reginfo[] = {
>        .opc0 = 3, .opc1 = 4, .crn = 10, .crm = 2, .opc2 = 0,
>        .access = PL2_RW, .fieldoffset = offsetof(CPUARMState, cp15.mair_el[2]),
>        .resetvalue = 0 },
> +    { .name = "TCR_EL2", .state = ARM_CP_STATE_AA64,
> +      .opc0 = 3, .opc1 = 4, .crn = 2, .crm = 0, .opc2 = 2,
> +      .access = PL2_RW, .writefn = vmsa_tcr_el1_write,
> +      .resetfn = vmsa_ttbcr_reset, .raw_writefn = raw_write,
> +      .fieldoffset = offsetof(CPUARMState, cp15.tcr_el[2]) },
>      REGINFO_SENTINEL
>  };

Same remarks about 32-bit counterparts and best way to do RAZ/WI
apply here.

-- PMM