Re: [PULL 00/36] target-arm queue

[Peter Maydell <peter.maydell@linaro.org>]

On Fri, 26 Jan 2024 at 14:33, Peter Maydell <peter.maydell@linaro.org> wrote:
>
> The following changes since commit 5bab95dc74d43bbb28c6a96d24c810a664432057:
>
>   Merge tag 'pull-request-2024-01-24' of https://gitlab.com/thuth/qemu into staging (2024-01-25 12:33:42 +0000)
>
> are available in the Git repository at:
>
>   https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20240126
>
> for you to fetch changes up to 5e6be95ed1578c7cfac2082b39384d99fd912508:
>
>   hw/arm: add PCIe to Freescale i.MX6 (2024-01-26 12:23:04 +0000)
>
> ----------------------------------------------------------------
> target-arm queue:
>  * Fix VNCR fault detection logic
>  * Fix A64 scalar SQSHRN and SQRSHRN
>  * Fix incorrect aa64_tidcp1 feature check
>  * hw/arm/virt.c: Remove newline from error_report() string
>  * hw/arm/musicpal: Convert to qemu_add_kbd_event_handler()
>  * hw/arm/allwinner-a10: Unconditionally map the USB Host controllers
>  * hw/arm/nseries: Unconditionally map the TUSB6010 USB Host controller
>  * hw/arm: Add EHCI/OHCI controllers to Allwinner R40 and Bananapi board
>  * hw/arm: Add AHCI/SATA controller to Allwinner R40 and Bananapi board
>  * hw/arm: Add watchdog timer to Allwinner H40 and Bananapi board
>  * arm: various include header cleanups
>  * cleanups to allow some files to be built only once
>  * fsl-imx6ul: Add various missing unimplemented devices
>  * docs/system/arm/virt.rst: Add note on CPU features off by default
>  * hw/char/imx_serial: Implement receive FIFO and ageing timer
>  * target/xtensa: fix OOB TLB entry access
>  * bswap.h: Fix const_le64() macro
>  * hw/arm: add PCIe to Freescale i.MX6


Applied, thanks.

Please update the changelog at https://wiki.qemu.org/ChangeLog/9.0
for any user-visible changes.

-- PMM