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* [PATCH v2] docs: add some notes on the sbsa-ref machine
@ 2020-11-04 16:52 Alex Bennée
  2020-11-09 11:40 ` Peter Maydell
  2020-11-09 13:10 ` Peter Maydell
  0 siblings, 2 replies; 3+ messages in thread
From: Alex Bennée @ 2020-11-04 16:52 UTC (permalink / raw)
  To: qemu-devel
  Cc: Graeme Gregory, Peter Maydell, Shashi Mallela,
	open list:ARM TCG CPUs, Leif Lindholm, Alex Bennée

We should at least document what this machine is about.

Reviewed-by: Graeme Gregory <graeme@nuviainc.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Shashi Mallela <shashi.mallela@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>

---
v2
  - reworded command line bit as per Leif
  - s/cortex-a57 cpus/AArch64 CPUs/
  - dropped the trailing .'s
---
 docs/system/arm/sbsa.rst   | 32 ++++++++++++++++++++++++++++++++
 docs/system/target-arm.rst |  1 +
 2 files changed, 33 insertions(+)
 create mode 100644 docs/system/arm/sbsa.rst

diff --git a/docs/system/arm/sbsa.rst b/docs/system/arm/sbsa.rst
new file mode 100644
index 0000000000..b8ecfdb62f
--- /dev/null
+++ b/docs/system/arm/sbsa.rst
@@ -0,0 +1,32 @@
+Arm Server Base System Architecture Reference board (``sbsa-ref``)
+==================================================================
+
+While the `virt` board is a generic board platform that doesn't match
+any real hardware the `sbsa-ref` board intends to look like real
+hardware. The `Server Base System Architecture
+<https://developer.arm.com/documentation/den0029/latest>` defines a
+minimum base line of hardware support and importantly how the firmware
+reports that to any operating system. It is a static system that
+reports a very minimal DT to the firmware for non-discoverable
+information about components affected by the qemu command line (i.e.
+cpus and memory). As a result it must have a firmware specifically
+built to expect a certain hardware layout (as you would in a real
+machine).
+
+It is intended to be a machine for developing firmware and testing
+standards compliance with operating systems.
+
+Supported devices
+"""""""""""""""""
+
+The sbsa-ref board supports:
+
+  - A configurable number of AArch64 CPUs
+  - GIC version 3
+  - System bus AHCI controller
+  - System bus EHCI controller
+  - CDROM and hard disc on AHCI bus
+  - E1000E ethernet card on PCIe bus
+  - VGA display adaptor on PCIe bus
+  - A generic SBSA watchdog device
+
diff --git a/docs/system/target-arm.rst b/docs/system/target-arm.rst
index fdcf25c237..9636f3fd00 100644
--- a/docs/system/target-arm.rst
+++ b/docs/system/target-arm.rst
@@ -79,6 +79,7 @@ undocumented; you can get a complete list by running
    arm/mps2
    arm/musca
    arm/realview
+   arm/sbsa-ref
    arm/versatile
    arm/vexpress
    arm/aspeed
-- 
2.20.1



^ permalink raw reply related	[flat|nested] 3+ messages in thread

* Re: [PATCH v2] docs: add some notes on the sbsa-ref machine
  2020-11-04 16:52 [PATCH v2] docs: add some notes on the sbsa-ref machine Alex Bennée
@ 2020-11-09 11:40 ` Peter Maydell
  2020-11-09 13:10 ` Peter Maydell
  1 sibling, 0 replies; 3+ messages in thread
From: Peter Maydell @ 2020-11-09 11:40 UTC (permalink / raw)
  To: Alex Bennée
  Cc: Graeme Gregory, Shashi Mallela, Leif Lindholm, QEMU Developers,
	open list:ARM TCG CPUs

On Wed, 4 Nov 2020 at 16:53, Alex Bennée <alex.bennee@linaro.org> wrote:
>
> We should at least document what this machine is about.
>
> Reviewed-by: Graeme Gregory <graeme@nuviainc.com>
> Cc: Leif Lindholm <leif@nuviainc.com>
> Cc: Shashi Mallela <shashi.mallela@linaro.org>
> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
>
> ---



Applied to target-arm.next, thanks.

-- PMM


^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: [PATCH v2] docs: add some notes on the sbsa-ref machine
  2020-11-04 16:52 [PATCH v2] docs: add some notes on the sbsa-ref machine Alex Bennée
  2020-11-09 11:40 ` Peter Maydell
@ 2020-11-09 13:10 ` Peter Maydell
  1 sibling, 0 replies; 3+ messages in thread
From: Peter Maydell @ 2020-11-09 13:10 UTC (permalink / raw)
  To: Alex Bennée
  Cc: Graeme Gregory, Shashi Mallela, Leif Lindholm, QEMU Developers,
	open list:ARM TCG CPUs

On Wed, 4 Nov 2020 at 16:53, Alex Bennée <alex.bennee@linaro.org> wrote:
>
> We should at least document what this machine is about.
>
> Reviewed-by: Graeme Gregory <graeme@nuviainc.com>
> Cc: Leif Lindholm <leif@nuviainc.com>
> Cc: Shashi Mallela <shashi.mallela@linaro.org>
> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
>
> ---
> v2
>   - reworded command line bit as per Leif
>   - s/cortex-a57 cpus/AArch64 CPUs/
>   - dropped the trailing .'s
> ---
>  docs/system/arm/sbsa.rst   | 32 ++++++++++++++++++++++++++++++++

This filename...

> --- a/docs/system/target-arm.rst
> +++ b/docs/system/target-arm.rst
> @@ -79,6 +79,7 @@ undocumented; you can get a complete list by running
>     arm/mps2
>     arm/musca
>     arm/realview
> +   arm/sbsa-ref

...doesn't match the name you used here, so the docs don't
build. I've fixed this nit in target-arm.next.

-- PMM


^ permalink raw reply	[flat|nested] 3+ messages in thread

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2020-11-04 16:52 [PATCH v2] docs: add some notes on the sbsa-ref machine Alex Bennée
2020-11-09 11:40 ` Peter Maydell
2020-11-09 13:10 ` Peter Maydell

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