Re: [PATCH] target/arm: fix MPIDR value for ARM CPUs with SMT

[Peter Maydell <peter.maydell@linaro.org>]

On Thu, 2 May 2024 at 14:50, Marcin Juszkiewicz
<marcin.juszkiewicz@linaro.org> wrote:
> Both hw/arm/sbsa-ref.c and hw/arm/virt.c build cpu information in
> DeviceTree using "arm_build_mp_afinnity()" function. So if firmware
> parses it then it gets wrong values.

What wrong values? The values in the dtb should match the
Aff* fields, they are not the complete MPIDR_EL1 values
including U and MT bits and so on:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/arm/cpus.yaml#n42
AIUI the ACPI spec says the same.

> Firmware should probably read MPIDR_EL1 directly instead but what with
> those who read DT and rely on this value already?

Firmware should probably not read MPIDR_EL1 directly for
topology information, because it's too vague and
unreliable. Either it's real-hardware firmware, in which
case it presumably knows the topology already, or else
it's running on QEMU, in which case this is one of the
things we can feed it via the DTB (either on virt or
or sbsa-ref).

thanks
-- PMM