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From: Peter Maydell <peter.maydell@linaro.org>
Date: Fri, 29 Jan 2016 17:05:47 +0000
Message-ID: <CAFEAcA908Y_a112aTXM46q7rhKHrHaK85pP7jKwZs5bc6evBug@mail.gmail.com>
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Subject: Re: [Qemu-devel] [PATCH 1/8] target-arm: Properly support EL2 and
 EL3 in arm_el_is_aa64()
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To: Sergey Fedorov <serge.fdrv@gmail.com>
Cc: Patch Tracking <patches@linaro.org>, QEMU Developers <qemu-devel@nongnu.org>, qemu-arm <qemu-arm@nongnu.org>, "Edgar E. Iglesias" <edgar.iglesias@gmail.com>, Paolo Bonzini <pbonzini@redhat.com>, =?UTF-8?B?QWxleCBCZW5uw6ll?= <alex.bennee@linaro.org>

On 29 January 2016 at 16:45, Sergey Fedorov <serge.fdrv@gmail.com> wrote:
> On 14.01.2016 21:34, Peter Maydell wrote:
>> Support EL2 and EL3 in arm_el_is_aa64() by implementing the
>> logic for checking the SCR_EL3 and HCR_EL2 register-width bits
>> as appropriate to determine the register width of lower exception
>> levels.
>
> Reviewed-by: Sergey Fedorov <serge.fdrv@gmail.com>

Thanks for the review, but this series went into master last week :-)

-- PMM