From mboxrd@z Thu Jan  1 00:00:00 1970
Received: from eggs.gnu.org ([2001:4830:134:3::10]:34797)
	by lists.gnu.org with esmtp (Exim 4.71)
	(envelope-from <peter.maydell@linaro.org>) id 1Ws7a7-0005df-KT
	for qemu-devel@nongnu.org; Wed, 04 Jun 2014 05:34:09 -0400
Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)
	(envelope-from <peter.maydell@linaro.org>) id 1Ws7a1-0006oV-LX
	for qemu-devel@nongnu.org; Wed, 04 Jun 2014 05:34:03 -0400
Received: from mail-lb0-f181.google.com ([209.85.217.181]:57500)
	by eggs.gnu.org with esmtp (Exim 4.71)
	(envelope-from <peter.maydell@linaro.org>) id 1Ws7a1-0006oJ-Eu
	for qemu-devel@nongnu.org; Wed, 04 Jun 2014 05:33:57 -0400
Received: by mail-lb0-f181.google.com with SMTP id q8so4200267lbi.12
	for <qemu-devel@nongnu.org>; Wed, 04 Jun 2014 02:33:56 -0700 (PDT)
MIME-Version: 1.0
In-Reply-To: <538EE73D.4080408@ozlabs.ru>
References: <1401869330-32449-1-git-send-email-aik@ozlabs.ru>
	<CAFEAcA8wx22KbtdGBq+GHUvcJnt9KV1aDo9fpzT5wt+rVOfHmQ@mail.gmail.com>
	<538EE73D.4080408@ozlabs.ru>
From: Peter Maydell <peter.maydell@linaro.org>
Date: Wed, 4 Jun 2014 10:33:36 +0100
Message-ID: <CAFEAcA9E2cAv7HdAvwcGHJ8RWq1gN2d+mrbdP+6utyQGeejoRw@mail.gmail.com>
Content-Type: text/plain; charset=UTF-8
Subject: Re: [Qemu-devel] [PATCH v3 0/4] cpus: Add generic NMI support
List-Id: <qemu-devel.nongnu.org>
List-Unsubscribe: <https://lists.nongnu.org/mailman/options/qemu-devel>,
	<mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>
List-Archive: <http://lists.nongnu.org/archive/html/qemu-devel>
List-Post: <mailto:qemu-devel@nongnu.org>
List-Help: <mailto:qemu-devel-request@nongnu.org?subject=help>
List-Subscribe: <https://lists.nongnu.org/mailman/listinfo/qemu-devel>,
	<mailto:qemu-devel-request@nongnu.org?subject=subscribe>
To: Alexey Kardashevskiy <aik@ozlabs.ru>
Cc: Stefan Hajnoczi <stefanha@redhat.com>, QEMU Developers <qemu-devel@nongnu.org>, Markus Armbruster <armbru@redhat.com>, Alexander Graf <agraf@suse.de>, Luiz Capitulino <lcapitulino@redhat.com>, "qemu-ppc@nongnu.org" <qemu-ppc@nongnu.org>, Alex Bligh <alex@alex.org.uk>, Cornelia Huck <cornelia.huck@de.ibm.com>, Paolo Bonzini <pbonzini@redhat.com>, =?UTF-8?Q?Andreas_F=C3=A4rber?= <afaerber@suse.de>, Richard Henderson <rth@twiddle.net>

On 4 June 2014 10:30, Alexey Kardashevskiy <aik@ozlabs.ru> wrote:
> On 06/04/2014 07:16 PM, Peter Maydell wrote:
>> On 4 June 2014 09:08, Alexey Kardashevskiy <aik@ozlabs.ru> wrote:
>>> This adds an NMI handler per CPUs. x86, s390 and ppc CPUS are supported.
>>>
>>> The change to existing behaviour is that x86 only delivers NMI to
>>> the current monitored CPU now, not to every CPU.
>>
>> So this series means that the "nmi" command and handler does
>>  * NMI on x86
>>  * reset on PPC
>
> The vector is called "reset" but it is an interrupt, and I do not see any
> way to mask it.
>
>>  * restart on S390
>
> The vector is called "restart" but it is still an interrupt.

So? ARM has an interrupt called "NMI" but there's zero reason
you'd want to poke it from the monitor, any more than you'd
want to try to hand-send any other kind of interrupt.

>> That doesn't seem generic at all, and suggests this should
>> not be a common CPU method/callback.
>
> Oh. Ok. Suggestions?

I dunno. What are you actually trying to achieve?

thanks
-- PMM