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From: Peter Maydell <peter.maydell@linaro.org>
To: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Cc: Edgar Iglesias <edgar.iglesias@xilinx.com>,
	Ryota Ozaki <ozaki.ryota@gmail.com>,
	michals@xilinx.com, QEMU Developers <qemu-devel@nongnu.org>,
	zach.pfeffer@xilinx.com
Subject: Re: [Qemu-devel] [PATCH target-arm v4 15/16] arm: xilinx-ep108: Add bootloading
Date: Thu, 23 Apr 2015 19:15:40 +0100	[thread overview]
Message-ID: <CAFEAcA9FnjTxiGStruowViahNC08C0sjreqxbdJaOxGsW6poVw@mail.gmail.com> (raw)
In-Reply-To: <8f036aa5e8b618bcce048c1ca9ce629ec49aad31.1427108387.git.peter.crosthwaite@xilinx.com>

On 23 March 2015 at 11:05, Peter Crosthwaite
<peter.crosthwaite@xilinx.com> wrote:
> Using standard ARM bootloader.

Commit msg, etc.

> Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
> ---
>  hw/arm/xlnx-ep108.c | 8 ++++++++
>  1 file changed, 8 insertions(+)
>
> diff --git a/hw/arm/xlnx-ep108.c b/hw/arm/xlnx-ep108.c
> index 6e89456..a86f595 100644
> --- a/hw/arm/xlnx-ep108.c
> +++ b/hw/arm/xlnx-ep108.c
> @@ -28,6 +28,8 @@ typedef struct XlnxEP108 {
>  /* Max 2GB RAM */
>  #define EP108_MAX_RAM_SIZE 0x80000000ull
>
> +static struct arm_boot_info xlnx_ep108_binfo;
> +
>  static void xlnx_ep108_init(MachineState *machine)
>  {
>      XlnxEP108 *s = g_new0(XlnxEP108, 1);
> @@ -58,6 +60,12 @@ static void xlnx_ep108_init(MachineState *machine)
>                             &error_abort);
>      vmstate_register_ram_global(&s->ddr_ram);
>      memory_region_add_subregion(get_system_memory(), 0, &s->ddr_ram);
> +
> +    xlnx_ep108_binfo.ram_size = machine->ram_size;
> +    xlnx_ep108_binfo.kernel_filename = machine->kernel_filename;
> +    xlnx_ep108_binfo.kernel_cmdline = machine->kernel_cmdline;
> +    xlnx_ep108_binfo.initrd_filename = machine->initrd_filename;

nb_cpus, loader_start ?

> +    arm_load_kernel(&s->soc.cpu[0], &xlnx_ep108_binfo);
>  }
>
>  static QEMUMachine xlnx_ep108_machine = {
> --
> 2.3.1.2.g90df61e.dirty

thanks
-- PMM

  parent reply	other threads:[~2015-04-23 18:16 UTC|newest]

Thread overview: 54+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-03-23 11:05 [Qemu-devel] [PATCH target-arm v4 00/16] Next Generation Xilinx Zynq SoC Peter Crosthwaite
2015-03-23 11:05 ` [Qemu-devel] [PATCH target-arm v4 01/16] cpus: Don't kick un-realized cpus Peter Crosthwaite
2015-03-23 11:05 ` [Qemu-devel] [PATCH target-arm v4 02/16] target-arm: cpu64: Factor out ARM cortex init Peter Crosthwaite
2015-04-23 17:35   ` Peter Maydell
2015-04-24 16:39     ` Peter Crosthwaite
2015-03-23 11:05 ` [Qemu-devel] [PATCH target-arm v4 03/16] target-arm: cpu64: Add support for cortex-a53 Peter Crosthwaite
2015-03-23 13:17   ` Ryota Ozaki
2015-04-24 16:42     ` Peter Crosthwaite
2015-03-23 11:05 ` [Qemu-devel] [PATCH target-arm v4 05/16] arm: xlnx-zynqmp: Add GIC Peter Crosthwaite
2015-04-23 17:45   ` Peter Maydell
2015-04-23 23:55     ` Peter Crosthwaite
2015-03-23 11:05 ` [Qemu-devel] [PATCH target-arm v4 04/16] arm: Introduce Xilinx ZynqMP SoC Peter Crosthwaite
2015-03-30  1:17   ` Alistair Francis
2015-04-23 17:42   ` Peter Maydell
2015-04-23 19:21     ` Peter Crosthwaite
2015-04-23 21:38       ` Peter Maydell
2015-04-24 15:26         ` Peter Maydell
2015-04-24 16:31           ` Peter Crosthwaite
2015-04-23 17:47   ` Peter Maydell
2015-04-23 19:30     ` Peter Crosthwaite
2015-03-23 11:05 ` [Qemu-devel] [PATCH target-arm v4 07/16] net: cadence_gem: Clean up variable names Peter Crosthwaite
2015-04-23 17:50   ` Peter Maydell
2015-04-24 16:51     ` Peter Crosthwaite
2015-03-23 11:05 ` [Qemu-devel] [PATCH target-arm v4 06/16] arm: xlnx-zynqmp: Connect CPU Timers to GIC Peter Crosthwaite
2015-03-30  1:29   ` Alistair Francis
2015-04-24  0:02     ` Peter Crosthwaite
2015-03-23 11:05 ` [Qemu-devel] [PATCH target-arm v4 08/16] net: cadence_gem: Split state struct and type into header Peter Crosthwaite
2015-04-23 17:51   ` Peter Maydell
2015-04-24  0:10     ` Peter Crosthwaite
2015-03-23 11:05 ` [Qemu-devel] [PATCH target-arm v4 10/16] char: cadence_uart: Clean up variable names Peter Crosthwaite
2015-04-23 17:59   ` Peter Maydell
2015-04-24  0:25     ` Peter Crosthwaite
2015-03-23 11:05 ` [Qemu-devel] [PATCH target-arm v4 11/16] char: cadence_uart: Split state struct and type into header Peter Crosthwaite
2015-04-23 18:00   ` Peter Maydell
2015-04-24  0:20     ` Peter Crosthwaite
2015-03-23 11:05 ` [Qemu-devel] [PATCH target-arm v4 13/16] arm: Add xlnx-ep108 machine Peter Crosthwaite
2015-03-30  1:11   ` Alistair Francis
2015-04-23 18:09   ` Peter Maydell
2015-03-23 11:05 ` [Qemu-devel] [PATCH target-arm v4 15/16] arm: xilinx-ep108: Add bootloading Peter Crosthwaite
2015-03-30  1:42   ` Alistair Francis
2015-04-23 18:15   ` Peter Maydell [this message]
2015-04-24  0:43     ` Peter Crosthwaite
2015-04-24 19:10       ` Peter Crosthwaite
2015-03-23 11:05 ` [Qemu-devel] [PATCH target-arm v4 14/16] arm: xilinx-ep108: Add external RAM Peter Crosthwaite
2015-03-30  1:31   ` Alistair Francis
2015-04-23 18:12   ` Peter Maydell
2015-04-24  0:36     ` Peter Crosthwaite
2015-03-23 11:05 ` [Qemu-devel] [PATCH target-arm v4 16/16] arm: xlnx-zynqmp: Add PSCI setup Peter Crosthwaite
2015-04-23 18:16   ` Peter Maydell
2015-04-24  0:46     ` Peter Crosthwaite
2015-03-30  1:21 ` [Qemu-devel] [PATCH target-arm v4 00/16] Next Generation Xilinx Zynq SoC Alistair Francis
     [not found] ` <267e60dda9e3d2ecfbd43d7fa86bf884a955ba44.1427108387.git.peter.crosthwaite@xilinx.com>
2015-04-23 17:52   ` [Qemu-devel] [PATCH target-arm v4 09/16] arm: xilinx-zynqmp: Add GEM support Peter Maydell
2015-04-24  0:12     ` Peter Crosthwaite
     [not found] ` <9c0afa7c2c54b22be3ad95f74efa4ccc3f0ca4ba.1427108387.git.peter.crosthwaite@xilinx.com>
2015-04-23 18:09   ` [Qemu-devel] [PATCH target-arm v4 12/16] arm: xilinx-zynqmp: Add UART support Peter Maydell

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