From: Peter Maydell <peter.maydell@linaro.org>
To: Alistair Francis <alistair.francis@wdc.com>
Cc: QEMU Developers <qemu-devel@nongnu.org>
Subject: Re: [PULL 0/5] riscv-to-apply queue
Date: Fri, 24 Jul 2020 10:51:59 +0100 [thread overview]
Message-ID: <CAFEAcA9H2EGfGUsojPwZLya22Tk4jsKuiry1EoN3y00DCz=Xxw@mail.gmail.com> (raw)
In-Reply-To: <20200722164838.1591305-1-alistair.francis@wdc.com>
On Wed, 22 Jul 2020 at 18:00, Alistair Francis <alistair.francis@wdc.com> wrote:
>
> The following changes since commit 3cbc8970f55c87cb58699b6dc8fe42998bc79dc0:
>
> Merge remote-tracking branch 'remotes/armbru/tags/pull-monitor-2020-07-21' into staging (2020-07-22 09:13:46 +0100)
>
> are available in the Git repository at:
>
> git@github.com:alistair23/qemu.git tags/pull-riscv-to-apply-20200722-1
>
> for you to fetch changes up to 8ba26b0b2b00dd5849a6c0981e358dc7a7cc315d:
>
> target/riscv: Fix the range of pmpcfg of CSR funcion table (2020-07-22 09:41:36 -0700)
>
> ----------------------------------------------------------------
> This PR contains a few RISC-V fixes.
>
> The main fix is the correction of the goldfish RTC time. On top of that
> some small fixes to the recently added vector extensions have been added
> (including an assert that fixed a coverity report). There is a change in
> the SiFive E debug memory size to match hardware. Finally there is a fix
> for PMP accesses.
Applied, thanks.
Please update the changelog at https://wiki.qemu.org/ChangeLog/5.1
for any user-visible changes.
-- PMM
next prev parent reply other threads:[~2020-07-24 9:54 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-22 16:48 [PULL 0/5] riscv-to-apply queue Alistair Francis
2020-07-22 16:48 ` [PULL 1/5] goldfish_rtc: Fix non-atomic read behaviour of TIME_LOW/TIME_HIGH Alistair Francis
2020-07-22 16:48 ` [PULL 2/5] target/riscv: Quiet Coverity complains about vamo* Alistair Francis
2020-07-22 16:48 ` [PULL 3/5] target/riscv: fix vector index load/store constraints Alistair Francis
2020-07-22 16:48 ` [PULL 4/5] hw/riscv: sifive_e: Correct debug block size Alistair Francis
2020-07-22 16:48 ` [PULL 5/5] target/riscv: Fix the range of pmpcfg of CSR funcion table Alistair Francis
2020-07-24 9:51 ` Peter Maydell [this message]
-- strict thread matches above, loose matches on Subject: below --
2023-07-19 4:45 [PULL 0/5] riscv-to-apply queue Alistair Francis
2023-07-19 19:30 ` Peter Maydell
2024-08-06 6:25 Alistair Francis
2024-08-06 9:42 ` Richard Henderson
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