From: Peter Maydell <peter.maydell@linaro.org>
To: Alex Rozenman <Alex_Rozenman@mentor.com>
Cc: Anthony Liguori <aliguori@us.ibm.com>,
Paul Brook <paul@codesourcery.com>,
Vladimir Pilko <Vladimir_Pilko@mentor.com>,
qemu-devel@nongnu.org, Alex Rozenman <rozenman@gmail.com>
Subject: Re: [Qemu-devel] [PATCH] Fix SWI (SVC) instruction in THUMB.
Date: Tue, 25 Dec 2012 23:00:45 +0000 [thread overview]
Message-ID: <CAFEAcA9O7w2kq-ptv6oPU7L-P76w9H4FBFjHhWtNP3qKTHf14A@mail.gmail.com> (raw)
In-Reply-To: <1356445309-12508-1-git-send-email-Alex_Rozenman@mentor.com>
On 25 December 2012 14:21, Alex Rozenman <Alex_Rozenman@mentor.com> wrote:
> target-arm/helper.c (do_interrupt_v7m): When do_interrupt_v7m is called,
> PC is already points to a correct instruction (after the SVC one). Don't
> modify the PC here.
Looks plausible, but (a) your commit message doesn't make it clear that this bug
only applies to SWI on M profile cores, not AR, and (b) could probably
use the comment that is present in the AR-core equivalent of this code:
/* The PC already points to the next instruction. */
This is one of those "surprised nobody's noticed this one before" bugs, do
the RTOSes we've tested with really not use SWI?
-- PMM
next prev parent reply other threads:[~2012-12-25 23:01 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-12-25 14:21 [Qemu-devel] [PATCH] Fix SWI (SVC) instruction in THUMB Alex Rozenman
2012-12-25 23:00 ` Peter Maydell [this message]
2012-12-25 23:04 ` Peter Maydell
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