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From: Peter Maydell <peter.maydell@linaro.org>
Date: Wed, 4 Dec 2013 22:19:18 +0000
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Subject: Re: [Qemu-devel] [PATCH v2 12/12] target-arm: A64: add support for
 compare and branch imm
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To: Richard Henderson <rth@twiddle.net>
Cc: Patch Tracking <patches@linaro.org>, Michael Matz <matz@suse.de>, Alexander Graf <agraf@suse.de>, QEMU Developers <qemu-devel@nongnu.org>, C Fontana <claudio.fontana@linaro.org>, Dirk Mueller <dmueller@suse.de>, Laurent Desnogues <laurent.desnogues@gmail.com>, "kvmarm@lists.cs.columbia.edu" <kvmarm@lists.cs.columbia.edu>

On 4 December 2013 21:59, Richard Henderson <rth@twiddle.net> wrote:
> On 12/05/2013 08:33 AM, Peter Maydell wrote:
>> +static TCGv_i64 read_cpu_reg(DisasContext *s, int reg, int sf)
>> +{
>> +    TCGv_i64 v = new_tmp_a64_zero(s);
>> +    if (reg != 31) {
>
> This is going to issue a garbage "movi tmp, 0" opcode for every non-XZR read.
> While the optimizer will remove that, it's only going to slow things down, and
> easily avoidable.
>
> Better to allocate the temporary and only perform the movi for reg == 31.

Yeah, I guess we should have a new_tmp_a64() that gives you an
uninitialized auto-freeing tmp, and then have new_tmp_a64_zero()
do { v = new_tmp_a64(); tcg_gen_movi_i64(v, 0); return v; }

(or not have the _zero variant at all, depending on whether it's
particularly useful.)

thanks
-- PMM