From: Peter Maydell <peter.maydell@linaro.org>
To: Richard Henderson <richard.henderson@linaro.org>
Cc: qemu-arm <qemu-arm@nongnu.org>, QEMU Developers <qemu-devel@nongnu.org>
Subject: Re: [PATCH for-6.2 03/43] target/arm: Implement do_unaligned_access for user-only
Date: Thu, 29 Jul 2021 14:14:16 +0100 [thread overview]
Message-ID: <CAFEAcA9ZZK2FhCptvypviDOoC-SQkP1rfANrPWZJH1F99GV87Q@mail.gmail.com> (raw)
In-Reply-To: <20210729004647.282017-4-richard.henderson@linaro.org>
On Thu, 29 Jul 2021 at 01:47, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> Cc: qemu-arm@nongnu.org
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> linux-user/aarch64/cpu_loop.c | 4 ++++
> linux-user/arm/cpu_loop.c | 43 +++++++++++++++++++++++++++--------
> target/arm/cpu.c | 2 +-
> target/arm/cpu_tcg.c | 2 +-
> 4 files changed, 40 insertions(+), 11 deletions(-)
>
> diff --git a/linux-user/aarch64/cpu_loop.c b/linux-user/aarch64/cpu_loop.c
> index ee72a1c20f..998831f87f 100644
> --- a/linux-user/aarch64/cpu_loop.c
> +++ b/linux-user/aarch64/cpu_loop.c
> @@ -137,6 +137,10 @@ void cpu_loop(CPUARMState *env)
> case 0x11: /* Synchronous Tag Check Fault */
> info.si_code = TARGET_SEGV_MTESERR;
> break;
> + case 0x21: /* Alignment fault */
> + info.si_signo = TARGET_SIGBUS;
> + info.si_code = TARGET_BUS_ADRALN;
> + break;
> default:
> g_assert_not_reached();
> }
> diff --git a/linux-user/arm/cpu_loop.c b/linux-user/arm/cpu_loop.c
> index 69632d15be..da7da6a0c1 100644
> --- a/linux-user/arm/cpu_loop.c
> +++ b/linux-user/arm/cpu_loop.c
> @@ -23,6 +23,7 @@
> #include "elf.h"
> #include "cpu_loop-common.h"
> #include "semihosting/common-semi.h"
> +#include "target/arm/syndrome.h"
Not a huge fan of linux-user files pulling in target/arm headers, but
I guess we do it already in aarch64/cpu_loop.c. (Though that is afaict
the only other place ATM...)
>
> #define get_user_code_u32(x, gaddr, env) \
> ({ abi_long __r = get_user_u32((x), (gaddr)); \
> @@ -286,9 +287,8 @@ void cpu_loop(CPUARMState *env)
> {
> CPUState *cs = env_cpu(env);
> int trapnr;
> - unsigned int n, insn;
> + unsigned int n, insn, ec, fsc;
> target_siginfo_t info;
> - uint32_t addr;
> abi_ulong ret;
>
> for(;;) {
> @@ -437,15 +437,40 @@ void cpu_loop(CPUARMState *env)
> break;
> case EXCP_PREFETCH_ABORT:
> case EXCP_DATA_ABORT:
> - addr = env->exception.vaddress;
> - {
> - info.si_signo = TARGET_SIGSEGV;
> - info.si_errno = 0;
> - /* XXX: check env->error_code */
> + info.si_signo = TARGET_SIGSEGV;
> + info.si_errno = 0;
> + info._sifields._sigfault._addr = env->exception.vaddress;
> + /*
> + * We should only arrive here with EC in {DATAABORT, INSNABORT},
> + * and short-form FSC, which then tells us to look at the FSR.
> + * ??? arm_cpu_reset never sets TTBCR_EAE, so we always get
> + * short-form FSC.
> + */
> + ec = syn_get_ec(env->exception.syndrome);
> + assert(ec == EC_DATAABORT || ec == EC_INSNABORT);
> + fsc = extract32(env->exception.syndrome, 0, 6);
> + assert(fsc == 0x3f);
> + switch (env->exception.fsr & 0x1f) {
> + case 0x1: /* Alignment */
> + info.si_signo = TARGET_SIGBUS;
> + info.si_code = TARGET_BUS_ADRALN;
> + break;
> + case 0x3: /* Access flag fault, level 1 */
> + case 0x6: /* Access flag fault, level 2 */
> + case 0x9: /* Domain fault, level 1 */
> + case 0xb: /* Domain fault, level 2 */
> + case 0xd: /* Permision fault, level 1 */
> + case 0xf: /* Permision fault, level 2 */
> + info.si_code = TARGET_SEGV_ACCERR;
> + break;
> + case 0x5: /* Translation fault, level 1 */
> + case 0x7: /* Translation fault, level 2 */
> info.si_code = TARGET_SEGV_MAPERR;
> - info._sifields._sigfault._addr = addr;
> - queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
> + break;
> + default:
> + g_assert_not_reached();
> }
> + queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
> break;
It's slightly sad that we start off with a nicely symbolic
ArmMMUFaultInfo type enum value, carefully encode it into a
numeric value and then have to switch on the numeric value here,
but I can see why we end up this way...
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
thanks
-- PMM
next prev parent reply other threads:[~2021-07-29 13:16 UTC|newest]
Thread overview: 101+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-29 0:46 [PATCH for-6.2 00/43] Unaligned accesses for user-only Richard Henderson
2021-07-29 0:46 ` [PATCH for-6.2 01/43] hw/core: Make do_unaligned_access available to user-only Richard Henderson
2021-07-29 6:14 ` Philippe Mathieu-Daudé
2021-07-29 6:19 ` Philippe Mathieu-Daudé
2021-07-29 17:51 ` Richard Henderson
2021-07-29 13:05 ` Peter Maydell
2021-07-29 0:46 ` [PATCH for-6.2 02/43] target/alpha: Implement do_unaligned_access for user-only Richard Henderson
2021-07-29 13:05 ` Peter Maydell
2021-07-29 0:46 ` [PATCH for-6.2 03/43] target/arm: " Richard Henderson
2021-07-29 13:14 ` Peter Maydell [this message]
2021-07-29 18:51 ` Richard Henderson
2021-07-29 0:46 ` [PATCH for-6.2 04/43] target/hppa: " Richard Henderson
2021-07-29 13:15 ` Peter Maydell
2021-07-29 17:55 ` Richard Henderson
2021-07-29 0:46 ` [PATCH for-6.2 05/43] target/microblaze: " Richard Henderson
2021-07-29 8:26 ` Philippe Mathieu-Daudé
2021-07-29 13:26 ` Peter Maydell
2021-07-29 18:00 ` Richard Henderson
2021-07-29 18:44 ` Edgar E. Iglesias
2021-07-29 0:46 ` [PATCH for-6.2 06/43] target/mips: " Richard Henderson
2021-07-29 0:46 ` [PATCH for-6.2 07/43] target/ppc: Set fault address in ppc_cpu_do_unaligned_access Richard Henderson
2021-07-29 13:44 ` Peter Maydell
2021-07-29 18:05 ` Richard Henderson
2021-07-30 17:13 ` Cédric Le Goater
2021-07-30 17:23 ` Cédric Le Goater
2021-07-30 16:58 ` Cédric Le Goater
2021-07-29 0:46 ` [PATCH for-6.2 08/43] target/ppc: Implement do_unaligned_access for user-only Richard Henderson
2021-07-29 0:46 ` [PATCH for-6.2 09/43] target/riscv: " Richard Henderson
2021-07-30 6:13 ` Alistair Francis
2021-07-29 0:46 ` [PATCH for-6.2 10/43] target/s390x: " Richard Henderson
2021-07-29 8:03 ` David Hildenbrand
2021-07-29 0:46 ` [PATCH for-6.2 11/43] target/sh4: Set fault address in superh_cpu_do_unaligned_access Richard Henderson
2021-07-29 6:15 ` Philippe Mathieu-Daudé
2021-07-29 0:46 ` [PATCH for-6.2 12/43] target/sh4: Implement do_unaligned_access for user-only Richard Henderson
2021-07-29 13:52 ` Peter Maydell
2021-07-30 0:01 ` Richard Henderson
2021-07-30 20:54 ` Rob Landley
2021-07-29 0:46 ` [PATCH for-6.2 13/43] target/sparc: Remove DEBUG_UNALIGNED Richard Henderson
2021-07-29 6:16 ` Philippe Mathieu-Daudé
2021-07-29 0:46 ` [PATCH for-6.2 14/43] target/sparc: Set fault address in sparc_cpu_do_unaligned_access Richard Henderson
2021-07-29 14:51 ` Peter Maydell
2021-08-01 15:56 ` Mark Cave-Ayland
2021-08-01 15:59 ` Peter Maydell
2021-08-01 16:13 ` Mark Cave-Ayland
2021-07-29 0:46 ` [PATCH for-6.2 15/43] target/sparc: Implement do_unaligned_access for user-only Richard Henderson
2021-07-29 9:40 ` Philippe Mathieu-Daudé
2021-07-29 18:20 ` Richard Henderson
2021-07-29 0:46 ` [PATCH for-6.2 16/43] target/xtensa: " Richard Henderson
2021-07-29 8:10 ` Philippe Mathieu-Daudé
2021-07-29 14:55 ` Peter Maydell
2021-07-29 18:22 ` Richard Henderson
2021-07-29 0:46 ` [PATCH for-6.2 17/43] accel/tcg: Report unaligned atomics " Richard Henderson
2021-07-29 15:02 ` Peter Maydell
2021-07-29 19:55 ` Philippe Mathieu-Daudé
2021-07-29 0:46 ` [PATCH for-6.2 18/43] accel/tcg: Drop signness in tracing in cputlb.c Richard Henderson
2021-07-29 0:46 ` [PATCH for-6.2 19/43] tcg: Expand MO_SIZE to 3 bits Richard Henderson
2021-07-29 6:23 ` Philippe Mathieu-Daudé
2021-07-29 0:46 ` [PATCH for-6.2 20/43] tcg: Rename TCGMemOpIdx to MemOpIdx Richard Henderson
2021-07-29 6:27 ` Philippe Mathieu-Daudé
2021-07-29 0:46 ` [PATCH for-6.2 21/43] tcg: Split out MemOpIdx to exec/memopidx.h Richard Henderson
2021-07-29 6:27 ` Philippe Mathieu-Daudé
2021-07-29 0:46 ` [PATCH for-6.2 22/43] trace/mem: Pass MemOpIdx to trace_mem_get_info Richard Henderson
2021-07-29 0:46 ` [PATCH for-6.2 23/43] accel/tcg: Remove double bswap for helper_atomic_sto_*_mmu Richard Henderson
2021-07-29 6:29 ` [PATCH for-6.1? " Philippe Mathieu-Daudé
2021-07-29 18:37 ` Richard Henderson
2021-07-29 0:46 ` [PATCH for-6.2 24/43] accel/tcg: Pass MemOpIdx to atomic_trace_*_post Richard Henderson
2021-07-29 6:31 ` Philippe Mathieu-Daudé
2021-07-29 0:46 ` [PATCH for-6.2 25/43] plugins: Reorg arguments to qemu_plugin_vcpu_mem_cb Richard Henderson
2021-08-30 21:26 ` Philippe Mathieu-Daudé
2021-07-29 0:46 ` [PATCH for-6.2 26/43] trace: Split guest_mem_before Richard Henderson
2021-07-29 0:46 ` [PATCH for-6.2 27/43] target/arm: Use MO_128 for 16 byte atomics Richard Henderson
2021-07-29 6:32 ` Philippe Mathieu-Daudé
2021-07-29 0:46 ` [PATCH for-6.2 28/43] target/i386: " Richard Henderson
2021-07-29 0:46 ` [PATCH for-6.2 29/43] target/ppc: " Richard Henderson
2021-07-29 6:34 ` Philippe Mathieu-Daudé
2021-07-29 0:46 ` [PATCH for-6.2 30/43] target/s390x: " Richard Henderson
2021-07-29 6:33 ` Philippe Mathieu-Daudé
2021-07-29 8:04 ` David Hildenbrand
2021-07-29 0:46 ` [PATCH for-6.2 31/43] target/hexagon: Implement cpu_mmu_index Richard Henderson
2021-07-29 2:37 ` Taylor Simpson
2021-07-29 6:35 ` Philippe Mathieu-Daudé
2021-07-29 0:46 ` [PATCH for-6.2 32/43] accel/tcg: Add cpu_{ld,st}*_mmu interfaces Richard Henderson
2021-07-29 0:46 ` [PATCH for-6.2 33/43] accel/tcg: Move cpu_atomic decls to exec/cpu_ldst.h Richard Henderson
2021-07-29 7:36 ` Philippe Mathieu-Daudé
2021-07-29 0:46 ` [PATCH for-6.2 34/43] target/mips: Use cpu_*_data_ra for msa load/store Richard Henderson
2021-07-29 7:38 ` Philippe Mathieu-Daudé
2021-07-29 0:46 ` [PATCH for-6.2 35/43] target/mips: Use 8-byte memory ops " Richard Henderson
2021-07-29 0:46 ` [PATCH for-6.2 36/43] target/s390x: Use cpu_*_mmu instead of helper_*_mmu Richard Henderson
2021-07-29 7:39 ` Philippe Mathieu-Daudé
2021-07-29 0:46 ` [PATCH for-6.2 37/43] target/sparc: " Richard Henderson
2021-07-29 0:46 ` [PATCH for-6.2 38/43] target/arm: " Richard Henderson
2021-07-29 7:41 ` Philippe Mathieu-Daudé
2021-07-29 0:46 ` [PATCH for-6.2 39/43] tcg: Move helper_*_mmu decls to tcg/tcg-ldst.h Richard Henderson
2021-07-29 7:42 ` Philippe Mathieu-Daudé
2021-07-29 0:46 ` [PATCH for-6.2 40/43] linux-user/alpha: Remove TARGET_ALIGNED_ONLY Richard Henderson
2021-07-29 0:46 ` [PATCH for-6.2 41/43] tcg: Add helper_unaligned_mmu for user-only sigbus Richard Henderson
2021-07-29 0:46 ` [PATCH for-6.2 42/43] tcg/i386: Support raising sigbus for user-only Richard Henderson
2021-07-29 0:46 ` [PATCH for-6.2 43/43] tests/tcg/multiarch: Add sigbus.c Richard Henderson
2021-07-29 6:14 ` [PATCH for-6.2 00/43] Unaligned accesses for user-only Philippe Mathieu-Daudé
2021-07-29 14:01 ` Claudio Fontana
2021-08-02 13:14 ` Peter Maydell
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