Re: Implementing IOMMU support for SDHCI

[Peter Maydell <peter.maydell@linaro.org>]

On Tue, 3 Mar 2020 at 06:05, Sai Pavan Boddu <saipava@xilinx.com> wrote:
> > From: Peter Maydell <peter.maydell@linaro.org>
> > I don't think any of those scenarios are ones where you'd want the board
> > model to be passing in a MemTxAttr at device creation time.
> [Sai Pavan Boddu] Yeah ok, this makes sense. Only things which me might need to configure are master id's and trust zone settings if possible.
> May be we can set them at soc emulation level i.e "hw/arm/xlnx-zynqmp.c"

For that kind of thing, a good guide is to look at what the
hardware does. If the device inside the SoC just has
a hardcoded master ID, hardcode it in the QEMU device
model. If it has some signal lines that the SoC has to tie
off to 1 or 0 to configure it, implement that as a QEMU
device property (usually with the same name and basic
semantics as the config signal lines).

thanks
-- PMM