From: Peter Maydell <peter.maydell@linaro.org>
To: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>
Cc: qemu-arm <qemu-arm@nongnu.org>,
QEMU Developers <qemu-devel@nongnu.org>,
"patches@linaro.org" <patches@linaro.org>,
Luc Michel <luc.michel@greensocs.com>,
Edgar Iglesias <edgari@xilinx.com>
Subject: Re: [Qemu-devel] [PATCH 10/10] target/arm: Implement support for taking exceptions to Hyp mode
Date: Wed, 15 Aug 2018 11:58:50 +0100 [thread overview]
Message-ID: <CAFEAcA9xhUQt72bgj9kCJsKSFPeywsSH0usXYqbYhmexO33yAA@mail.gmail.com> (raw)
In-Reply-To: <20180815105430.e6satguezkvfudf5@toto>
On 15 August 2018 at 11:54, Edgar E. Iglesias <edgar.iglesias@xilinx.com> wrote:
> On Tue, Aug 14, 2018 at 01:42:54PM +0100, Peter Maydell wrote:
>> Implement the necessary support code for taking exceptions
>> to Hyp mode in AArch32.
>
> Hi Peter,
>
> A general comment that I think this would be a little easier
> to look at if it was split into two patches, one non-functional
> change to break-out take_aarch32_exception() and then another
> patch to add the new logic...
Yeah, you're right. I'll split it.
>> + mask = 0;
>> + if (!(env->cp15.scr_el3 & SCR_EA)) {
>> + mask |= CPSR_A;
>> + }
>> + if (!(env->cp15.scr_el3 & SCR_IRQ)) {
>> + mask |= CPSR_I;
>> + }
>> + if (!(env->cp15.scr_el3 & SCR_IRQ)) {a
> ^^^^^^^
> I think this should test for SCR_FIQ.
Yep, cut-n-paste error.
thanks
-- PMM
next prev parent reply other threads:[~2018-08-15 10:59 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-08-14 12:42 [Qemu-devel] [PATCH 00/10] target/arm: Some pieces of support for 32-bit Hyp mode Peter Maydell
2018-08-14 12:42 ` [Qemu-devel] [PATCH 01/10] target/arm: Correct typo in HAMAIR1 regdef name Peter Maydell
2018-08-14 14:33 ` Edgar E. Iglesias
2018-08-15 9:02 ` Luc Michel
2018-08-14 12:42 ` [Qemu-devel] [PATCH 02/10] target/arm: Add missing .cp = 15 to HMAIR1 and HAMAIR1 regdefs Peter Maydell
2018-08-14 14:41 ` Edgar E. Iglesias
2018-08-14 14:45 ` Peter Maydell
2018-08-15 9:10 ` Luc Michel
2018-08-14 12:42 ` [Qemu-devel] [PATCH 03/10] target/arm: Implement RAZ/WI HACTLR2 Peter Maydell
2018-08-14 14:44 ` Edgar E. Iglesias
2018-08-15 12:14 ` Luc Michel
2018-08-14 12:42 ` [Qemu-devel] [PATCH 04/10] target/arm: Implement AArch32 HVBAR Peter Maydell
2018-08-14 14:46 ` Edgar E. Iglesias
2018-08-15 12:26 ` Luc Michel
2018-08-14 12:42 ` [Qemu-devel] [PATCH 05/10] target/arm: Implement AArch32 HCR and HCR2 Peter Maydell
2018-08-14 14:52 ` Edgar E. Iglesias
2018-08-16 8:55 ` Luc Michel
2018-08-16 9:02 ` Peter Maydell
2018-08-14 12:42 ` [Qemu-devel] [PATCH 06/10] target/arm: Implement AArch32 Hyp FARs Peter Maydell
2018-08-14 14:57 ` Edgar E. Iglesias
2018-08-16 9:01 ` Luc Michel
2018-08-14 12:42 ` [Qemu-devel] [PATCH 07/10] target/arm: Implement ESR_EL2/HSR for AArch32 and no-EL2 Peter Maydell
2018-08-14 14:59 ` Edgar E. Iglesias
2018-08-16 9:16 ` Luc Michel
2018-08-14 12:42 ` [Qemu-devel] [PATCH 08/10] target/arm: Permit accesses to ELR_Hyp from Hyp mode via MSR/MRS (banked) Peter Maydell
2018-08-14 15:07 ` Edgar E. Iglesias
2018-08-16 7:58 ` Luc Michel
2018-08-14 12:42 ` [Qemu-devel] [PATCH 09/10] target/arm: Implement AArch32 ERET instruction Peter Maydell
2018-08-15 11:00 ` Edgar E. Iglesias
2018-08-16 8:10 ` Luc Michel
2018-08-14 12:42 ` [Qemu-devel] [PATCH 10/10] target/arm: Implement support for taking exceptions to Hyp mode Peter Maydell
2018-08-15 10:54 ` Edgar E. Iglesias
2018-08-15 10:58 ` Peter Maydell [this message]
2018-08-15 11:04 ` [Qemu-devel] [PATCH 00/10] target/arm: Some pieces of support for 32-bit " Edgar E. Iglesias
2018-08-15 11:13 ` Peter Maydell
2018-08-17 10:15 ` [Qemu-devel] [Qemu-arm] " Peter Maydell
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