Re: [Qemu-devel] [PATCH RFC V4 0/4] Implement GIC-500 from GICv3 family for arm64

[Peter Maydell <peter.maydell@linaro.org>]

On 17 September 2015 at 18:38, Shlomo Pongratz <shlomopongratz@gmail.com> wrote:
> From: Shlomo Pongratz <shlomo.pongratz@huawei.com>
>
> This patch is a first step toward 128 cores support for arm64.
>
> At first only 64 cores are supported.
> This is because largest integer type has the size of 64 bits and modifying
> essential data structures in order to support 128 cores will require
> the usage of bitops.
>
> Things left to do:
>
> Support SPI, note that this patch porpose is to enable running 64 cores using
> the "virt" virtual machine.
>
> Add support for 128 cores. This requires the usage
> of bitops which requires a major rewrite.
>
> Special thanks to Peter Crostwaite whose patch to th Linux (kernel) i.e.
> Implement cpu_relax as yield solved the problem of the boot process getting
> stuck for 24 cores and more.

This still seems to have the same issues as were noted in previous
rounds:
 * you need to get rid of the limitation on number of cores. There
   should be no hard limit imposed by the GIC emulation code: not
   64, not 128, not anything.
 * patch 2 is over 2000 lines, which is far too big to review. It
   needs to be split up. Aim for 200 lines per patch at maximum;
   smaller is better.

Also, patch 4 looks like it's an older version of one of Pavel's;
you probably want to rebase on top of Pavel's recent v14 series,
which is nearly ready to go into master.

thanks
-- PMM