From: Peter Maydell <peter.maydell@linaro.org>
To: "Alex Bennée" <alex.bennee@linaro.org>
Cc: qemu-devel@nongnu.org,
Julian Armistead <julian.armistead@linaro.org>,
"open list:ARM TCG CPUs" <qemu-arm@nongnu.org>
Subject: Re: [RFC PATCH] target/arm: allow gdb to read ARM_CP_NORAW regs
Date: Thu, 8 May 2025 11:08:31 +0100 [thread overview]
Message-ID: <CAFEAcA_0cf=XEbH9VQdTHqu1wekSmFDLdqnnzpcwnshCT-UUCg@mail.gmail.com> (raw)
In-Reply-To: <20250507165840.401623-1-alex.bennee@linaro.org>
On Wed, 7 May 2025 at 17:58, Alex Bennée <alex.bennee@linaro.org> wrote:
>
> Before this we suppress all ARM_CP_NORAW registers being listed under
> GDB. This includes useful registers like CurrentEL which gets tagged
> as ARM_CP_NO_RAW because it is one of the ARM_CP_SPECIAL_MASK
> registers. These are registers TCG can directly compute because we
> have the information at compile time but until now with no readfn.
>
> Add a .readfn to return the CurrentEL and then loosen the restrictions
> in arm_register_sysreg_for_feature to allow ARM_CP_NORAW registers to
> be read if there is a readfn available.
The primary use case for NO_RAW is "system instructions" like
the TLB maintenance insns. These don't make sense to expose
to a debugger.
If we want the gdbstub access to system registers to be
more than our current "we provide the ones that are easy",
then I think I'd like to see a bit more up-front analysis of
what the gdbstub needs and whether we've got into a bit of
a mess with our ARM_CP_* flags that we could straighten out.
thanks
-- PMM
next prev parent reply other threads:[~2025-05-08 10:09 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-07 16:58 [RFC PATCH] target/arm: allow gdb to read ARM_CP_NORAW regs Alex Bennée
2025-05-08 10:08 ` Peter Maydell [this message]
2025-05-08 11:50 ` Alex Bennée
2025-05-08 12:07 ` Peter Maydell
2025-05-08 13:37 ` Alex Bennée
2025-05-08 13:50 ` Peter Maydell
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