Re: [PATCH 32/65] hw/intc/arm_gicv5: Cache pending LPIs in a hash table

[Peter Maydell <peter.maydell@linaro.org>]

On Wed, 11 Mar 2026 at 15:46, Jonathan Cameron
<jonathan.cameron@huawei.com> wrote:
>
> On Mon, 23 Feb 2026 17:01:39 +0000
> Peter Maydell <peter.maydell@linaro.org> wrote:
>
> > The GICv5 stores information about LPIs in a guest-memory data
> > structure.  Iterating through this to identify the highest priority
> > pending interrupt would be expensive; to avoid this we will use a
> > hash table which contains an entry for each pending LPI and which
> > caches the L2 ISTE.  Typically only a few LPIs will be pending at any
> > one time, so iterating through the hash table should be fast.
> >
> > We can access an L2 ISTE whenever it is valid, and can freely cache
> > the data for as long as the IST is valid.  We only need to ensure
> > that we have written back the data at the point where
> > IRS_IST_BASER.VALID is written to 0.
> >
> > We add an LPI to the cache when the pending bit is written to 1, and
> > remove it when it is written to 0.  Handling of checking the cache,
> > and of adding and removing entries, is handled within get_l2_iste()
> > and put_l2_iste(), which all the operations that read and write ISTE
> > words use.
> >
> > Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> LGTM
> Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
>
> > ---
> >  hw/intc/arm_gicv5.c         | 110 +++++++++++++++++++++++++++++++++++-
> >  include/hw/intc/arm_gicv5.h |   2 +
> >  2 files changed, 111 insertions(+), 1 deletion(-)
> >
> > diff --git a/hw/intc/arm_gicv5.c b/hw/intc/arm_gicv5.c
> > index fa7692ca0e..30368998d3 100644
> > --- a/hw/intc/arm_gicv5.c
> > +++ b/hw/intc/arm_gicv5.c
> > @@ -474,10 +474,21 @@ static bool write_l2_iste_mem(GICv5Common *cs, const GICv5ISTConfig *cfg,
> >   * reads and writes to update the L2 ISTE. In a future commit we
> >   * will add support for a cache of some of the ISTE data in a
> >   * local hashtable; the APIs are designed with that in mind.
> > + * Not all these fields are always valid; they are private to
> > + * the implementation of get_l2_iste() and put_l2_iste().
>
> Completely trivial but wrap seems to be getting shorter as this comment gains
> lines!

I also forgot to remove "In a future commit ..." part now we have
got to this future commit and added the hashtable :-) Fixed to:

 /*
  * This is returned by get_l2_iste() and has everything we
  * need to do the writeback of the L2 ISTE word in put_l2_iste().
- * Currently the get/put functions always directly do guest memory
- * reads and writes to update the L2 ISTE. In a future commit we
- * will add support for a cache of some of the ISTE data in a
- * local hashtable; the APIs are designed with that in mind.
+ * Not all these fields are always valid; they are private to the
+ * implementation of get_l2_iste() and put_l2_iste().
  */


thanks
-- PMM