From: Peter Maydell <peter.maydell@linaro.org>
To: Max Filippov <jcmvbkbc@gmail.com>
Cc: Blue Swirl <blauwirbel@gmail.com>, qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH v2 02/10] softfloat: add NO_SIGNALING_NANS
Date: Sun, 9 Sep 2012 17:18:03 +0100 [thread overview]
Message-ID: <CAFEAcA_32ViTY8Msvs3gRoYiPJo-RX1v4vBFQkQ+KE8_Bzr-ow@mail.gmail.com> (raw)
In-Reply-To: <1347206679-428-3-git-send-email-jcmvbkbc@gmail.com>
On 9 September 2012 17:04, Max Filippov <jcmvbkbc@gmail.com> wrote:
> Architectures that don't have signaling NaNs can define
> NO_SIGNALING_NANS, it will make float*_is_quiet_nan return 1 for any NaN
> and float*_is_signaling_nan always return 0.
>
> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
> ---
> fpu/softfloat-specialize.h | 64 ++++++++++++++++++++++++++++++++++++++++++++
> fpu/softfloat.h | 5 +++
> 2 files changed, 69 insertions(+), 0 deletions(-)
>
> diff --git a/fpu/softfloat-specialize.h b/fpu/softfloat-specialize.h
> index 4902450..2b203b9 100644
> --- a/fpu/softfloat-specialize.h
> +++ b/fpu/softfloat-specialize.h
> @@ -41,6 +41,10 @@ these four paragraphs for those parts of this code that are retained.
> #define SNAN_BIT_IS_ONE 0
> #endif
>
> +#if defined(TARGET_XTENSA)
> +#define NO_SIGNALING_NANS 1
> +#endif
This could use a comment, I think.
/* Define for architectures which deviate from IEEE in not supporting
* signaling NaNs (so all NaNs are treated as quiet).
*/
-- PMM
next prev parent reply other threads:[~2012-09-09 16:18 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-09-09 16:04 [Qemu-devel] [PATCH v2 00/10] target-xtensa: implement FP coprocessor option Max Filippov
2012-09-09 16:04 ` [Qemu-devel] [PATCH v2 01/10] softfloat: make float_muladd_negate_* flags independent Max Filippov
2012-09-09 16:04 ` [Qemu-devel] [PATCH v2 02/10] softfloat: add NO_SIGNALING_NANS Max Filippov
2012-09-09 16:18 ` Peter Maydell [this message]
2012-09-09 16:04 ` [Qemu-devel] [PATCH v2 03/10] target-xtensa: handle boolean option in overlays Max Filippov
2012-09-09 16:04 ` [Qemu-devel] [PATCH v2 04/10] target-xtensa: specialize softfloat NaN rules Max Filippov
2012-09-09 16:04 ` [Qemu-devel] [PATCH v2 05/10] target-xtensa: add FP registers Max Filippov
2012-09-09 16:04 ` [Qemu-devel] [PATCH v2 06/10] target-xtensa: implement LSCX and LSCI groups Max Filippov
2012-09-09 16:04 ` [Qemu-devel] [PATCH v2 07/10] target-xtensa: implement FP0 arithmetic Max Filippov
2012-09-09 16:04 ` [Qemu-devel] [PATCH v2 08/10] target-xtensa: implement FP0 conversions Max Filippov
2012-09-09 16:16 ` Peter Maydell
2012-09-09 16:38 ` Max Filippov
2012-09-09 17:24 ` Marc Gauthier
2012-09-09 18:39 ` Max Filippov
2012-09-19 0:28 ` Max Filippov
2012-09-09 16:04 ` [Qemu-devel] [PATCH v2 09/10] target-xtensa: implement FP1 group Max Filippov
2012-09-09 16:04 ` [Qemu-devel] [PATCH v2 10/10] target-xtensa: implement coprocessor context option Max Filippov
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