From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:40793) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZHVsP-0002V9-Q8 for qemu-devel@nongnu.org; Tue, 21 Jul 2015 07:38:26 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZHVsL-00012I-3O for qemu-devel@nongnu.org; Tue, 21 Jul 2015 07:38:25 -0400 Received: from mail-vn0-f47.google.com ([209.85.216.47]:36119) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZHVsL-00012E-0D for qemu-devel@nongnu.org; Tue, 21 Jul 2015 07:38:21 -0400 Received: by vnk197 with SMTP id 197so34334044vnk.3 for ; Tue, 21 Jul 2015 04:38:20 -0700 (PDT) MIME-Version: 1.0 In-Reply-To: <1437416961-26348-3-git-send-email-jsnow@redhat.com> References: <1437416961-26348-1-git-send-email-jsnow@redhat.com> <1437416961-26348-3-git-send-email-jsnow@redhat.com> From: Peter Maydell Date: Tue, 21 Jul 2015 12:38:00 +0100 Message-ID: Content-Type: text/plain; charset=UTF-8 Subject: Re: [Qemu-devel] [PULL 2/3] ahci: Force ICC bits in PxCMD to zero List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: John Snow Cc: Stefan Fritsch , QEMU Developers On 20 July 2015 at 19:29, John Snow wrote: > From: Stefan Fritsch > > The AHCI spec requires that the HBA sets the ICC bits to zero after the > ICC change is done. Since we don't do any ICC change, force the bits to > zero all the time. > > This fixes delays with some OSs (e.g. OpenBSD) waiting for the ICC bits > to change to 0. This change provokes a lot of clang sanitizer warnings: /home/petmay01/linaro/qemu-for-merges/hw/ide/ahci.c:288:49: runtime error: left shift of 15 by 28 places cannot be represented in type 'int' PORT_CMD_ICC_MASK is defined as #define PORT_CMD_ICC_MASK (0xf << 28) /* i/f ICC state mask */ which shifts into the sign bit of a signed integer. thanks -- PMM