From: Peter Maydell <peter.maydell@linaro.org>
To: Richard Henderson <richard.henderson@linaro.org>
Cc: QEMU Developers <qemu-devel@nongnu.org>
Subject: Re: [PULL v2 00/31] target/hexagon patch queue
Date: Mon, 3 May 2021 12:04:01 +0100 [thread overview]
Message-ID: <CAFEAcA_7zKo_xKCwXcHDL+4A8-TQTHtb1B9edBERQcFD2L5daA@mail.gmail.com> (raw)
In-Reply-To: <20210502144419.1659844-1-richard.henderson@linaro.org>
On Sun, 2 May 2021 at 15:44, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> The following changes since commit 8f860d2633baf9c2b6261f703f86e394c6bc22ca:
>
> Merge remote-tracking branch 'remotes/armbru/tags/pull-qapi-2021-04-30' into staging (2021-04-30 16:02:00 +0100)
>
> are available in the Git repository at:
>
> https://gitlab.com/rth7680/qemu.git tags/pull-hex-20210502
>
> for you to fetch changes up to e628c0156be74dd14a261bbd18674bacd1afcc7d:
>
> Hexagon (target/hexagon) CABAC decode bin (2021-05-01 16:06:11 -0700)
>
> ----------------------------------------------------------------
> Minor cleanups.
> Finish the rest of the hexagon integer instructions.
>
> ----------------------------------------------------------------
> Taylor Simpson (31):
> target/hexagon: translation changes
> target/hexagon: remove unnecessary checks in find_iclass_slots
> target/hexagon: Change DECODE_MAPPED_REG operand name to OPNUM
> target/hexagon: fix typo in comment
> target/hexagon: remove unnecessary semicolons
> Hexagon (target/hexagon) TCG generation cleanup
> Hexagon (target/hexagon) cleanup gen_log_predicated_reg_write_pair
> Hexagon (target/hexagon) remove unnecessary inline directives
> Hexagon (target/hexagon) use env_archcpu and env_cpu
> Hexagon (target/hexagon) properly generate TB end for DISAS_NORETURN
> Hexagon (target/hexagon) decide if pred has been written at TCG gen time
> Hexagon (target/hexagon) change variables from int to bool when appropriate
> Hexagon (target/hexagon) remove unused carry_from_add64 function
> Hexagon (target/hexagon) change type of softfloat_roundingmodes
> Hexagon (target/hexagon) use softfloat default NaN and tininess
> Hexagon (target/hexagon) replace float32_mul_pow2 with float32_scalbn
> Hexagon (target/hexagon) use softfloat for float-to-int conversions
> Hexagon (target/hexagon) cleanup ternary operators in semantics
> Hexagon (target/hexagon) cleanup reg_field_info definition
> Hexagon (target/hexagon) move QEMU_GENERATE to only be on during macros.h
> Hexagon (target/hexagon) compile all debug code
> Hexagon (target/hexagon) add F2_sfrecipa instruction
> Hexagon (target/hexagon) add F2_sfinvsqrta
> Hexagon (target/hexagon) add A5_ACS (vacsh)
> Hexagon (target/hexagon) add A6_vminub_RdP
> Hexagon (target/hexagon) add A4_addp_c/A4_subp_c
> Hexagon (target/hexagon) circular addressing
> Hexagon (target/hexagon) bit reverse (brev) addressing
> Hexagon (target/hexagon) load and unpack bytes instructions
> Hexagon (target/hexagon) load into shifted register instructions
> Hexagon (target/hexagon) CABAC decode bin
Applied, thanks.
Please update the changelog at https://wiki.qemu.org/ChangeLog/6.1
for any user-visible changes.
-- PMM
prev parent reply other threads:[~2021-05-03 11:06 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-02 14:43 [PULL v2 00/31] target/hexagon patch queue Richard Henderson
2021-05-02 14:43 ` [PULL v2 01/31] target/hexagon: translation changes Richard Henderson
2021-05-02 14:43 ` [PULL v2 02/31] target/hexagon: remove unnecessary checks in find_iclass_slots Richard Henderson
2021-05-02 14:43 ` [PULL v2 03/31] target/hexagon: Change DECODE_MAPPED_REG operand name to OPNUM Richard Henderson
2021-05-02 14:43 ` [PULL v2 04/31] target/hexagon: fix typo in comment Richard Henderson
2021-05-02 14:43 ` [PULL v2 05/31] target/hexagon: remove unnecessary semicolons Richard Henderson
2021-05-02 14:43 ` [PULL v2 06/31] Hexagon (target/hexagon) TCG generation cleanup Richard Henderson
2021-05-02 14:43 ` [PULL v2 07/31] Hexagon (target/hexagon) cleanup gen_log_predicated_reg_write_pair Richard Henderson
2021-05-02 14:43 ` [PULL v2 08/31] Hexagon (target/hexagon) remove unnecessary inline directives Richard Henderson
2021-05-02 14:43 ` [PULL v2 09/31] Hexagon (target/hexagon) use env_archcpu and env_cpu Richard Henderson
2021-05-02 14:43 ` [PULL v2 10/31] Hexagon (target/hexagon) properly generate TB end for DISAS_NORETURN Richard Henderson
2021-05-02 14:43 ` [PULL v2 11/31] Hexagon (target/hexagon) decide if pred has been written at TCG gen time Richard Henderson
2021-05-02 14:44 ` [PULL v2 12/31] Hexagon (target/hexagon) change variables from int to bool when appropriate Richard Henderson
2021-05-02 14:44 ` [PULL v2 13/31] Hexagon (target/hexagon) remove unused carry_from_add64 function Richard Henderson
2021-05-02 14:44 ` [PULL v2 14/31] Hexagon (target/hexagon) change type of softfloat_roundingmodes Richard Henderson
2021-05-02 14:44 ` [PULL v2 15/31] Hexagon (target/hexagon) use softfloat default NaN and tininess Richard Henderson
2024-11-28 13:29 ` Peter Maydell
2024-11-28 18:30 ` Richard Henderson
2021-05-02 14:44 ` [PULL v2 16/31] Hexagon (target/hexagon) replace float32_mul_pow2 with float32_scalbn Richard Henderson
2021-05-02 14:44 ` [PULL v2 17/31] Hexagon (target/hexagon) use softfloat for float-to-int conversions Richard Henderson
2021-05-02 14:44 ` [PULL v2 18/31] Hexagon (target/hexagon) cleanup ternary operators in semantics Richard Henderson
2021-05-02 14:44 ` [PULL v2 19/31] Hexagon (target/hexagon) cleanup reg_field_info definition Richard Henderson
2021-05-02 14:44 ` [PULL v2 20/31] Hexagon (target/hexagon) move QEMU_GENERATE to only be on during macros.h Richard Henderson
2021-05-02 14:44 ` [PULL v2 21/31] Hexagon (target/hexagon) compile all debug code Richard Henderson
2021-05-02 14:44 ` [PULL v2 22/31] Hexagon (target/hexagon) add F2_sfrecipa instruction Richard Henderson
2021-05-02 14:44 ` [PULL v2 23/31] Hexagon (target/hexagon) add F2_sfinvsqrta Richard Henderson
2021-05-02 14:44 ` [PULL v2 24/31] Hexagon (target/hexagon) add A5_ACS (vacsh) Richard Henderson
2021-05-02 14:44 ` [PULL v2 25/31] Hexagon (target/hexagon) add A6_vminub_RdP Richard Henderson
2021-05-02 14:44 ` [PULL v2 26/31] Hexagon (target/hexagon) add A4_addp_c/A4_subp_c Richard Henderson
2021-05-02 14:44 ` [PULL v2 27/31] Hexagon (target/hexagon) circular addressing Richard Henderson
2021-05-02 14:44 ` [PULL v2 28/31] Hexagon (target/hexagon) bit reverse (brev) addressing Richard Henderson
2021-05-02 14:44 ` [PULL v2 29/31] Hexagon (target/hexagon) load and unpack bytes instructions Richard Henderson
2021-05-02 14:44 ` [PULL v2 30/31] Hexagon (target/hexagon) load into shifted register instructions Richard Henderson
2021-05-02 14:44 ` [PULL v2 31/31] Hexagon (target/hexagon) CABAC decode bin Richard Henderson
2021-05-03 11:04 ` Peter Maydell [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=CAFEAcA_7zKo_xKCwXcHDL+4A8-TQTHtb1B9edBERQcFD2L5daA@mail.gmail.com \
--to=peter.maydell@linaro.org \
--cc=qemu-devel@nongnu.org \
--cc=richard.henderson@linaro.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).