From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:56101) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SQHsa-0005hl-9W for qemu-devel@nongnu.org; Fri, 04 May 2012 08:45:12 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1SQHsY-0008Vr-Ga for qemu-devel@nongnu.org; Fri, 04 May 2012 08:44:59 -0400 Received: from mail-yx0-f173.google.com ([209.85.213.173]:47124) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SQHsY-0008TK-CA for qemu-devel@nongnu.org; Fri, 04 May 2012 08:44:58 -0400 Received: by yenr5 with SMTP id r5so3320222yen.4 for ; Fri, 04 May 2012 05:44:55 -0700 (PDT) MIME-Version: 1.0 In-Reply-To: References: Date: Fri, 4 May 2012 13:44:55 +0100 Message-ID: From: Peter Maydell Content-Type: text/plain; charset=UTF-8 Subject: Re: [Qemu-devel] [PATCH 22/35] arm: save always 32 fpu registers List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Juan Quintela Cc: qemu-devel@nongnu.org On 4 May 2012 11:54, Juan Quintela wrote: > This way, we fix a bug (we were overwritten the 16 first registers on > load), and we don't need to check for ARM_FEATURE_VPF3, we always send > the 32 registers. As I pointed out last time around, this bug is already fixed in master and you need to correct this commit message. -- PMM