From: Peter Maydell <peter.maydell@linaro.org>
To: Richard Henderson <richard.henderson@linaro.org>
Cc: qemu-devel@nongnu.org, qemu-arm@nongnu.org, yier.jin@huawei.com,
jonathan.cameron@huawei.com, leonardo.garcia@linaro.org
Subject: Re: [PATCH 18/22] target/arm: Add GPC syndrome
Date: Fri, 10 Feb 2023 13:32:46 +0000 [thread overview]
Message-ID: <CAFEAcA_Gqzf6FZbVuPdkk_MvKbaPDY7Aa86CRqwVFDOPfh-o3w@mail.gmail.com> (raw)
In-Reply-To: <20230124000027.3565716-19-richard.henderson@linaro.org>
On Tue, 24 Jan 2023 at 00:02, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> The function takes the fields as filled in by
> the Arm ARM pseudocode for TakeGPCException.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> target/arm/syndrome.h | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
> diff --git a/target/arm/syndrome.h b/target/arm/syndrome.h
> index 73df5e3793..3fa926d115 100644
> --- a/target/arm/syndrome.h
> +++ b/target/arm/syndrome.h
> @@ -49,6 +49,7 @@ enum arm_exception_class {
> EC_SYSTEMREGISTERTRAP = 0x18,
> EC_SVEACCESSTRAP = 0x19,
> EC_SMETRAP = 0x1d,
> + EC_GPC = 0x1e,
> EC_INSNABORT = 0x20,
> EC_INSNABORT_SAME_EL = 0x21,
> EC_PCALIGNMENT = 0x22,
> @@ -237,6 +238,14 @@ static inline uint32_t syn_bxjtrap(int cv, int cond, int rm)
> (cv << 24) | (cond << 20) | rm;
> }
>
> +static inline uint32_t syn_gpc(int s2ptw, int ind, int gpcsc,
> + int cm, int s1ptw, int wnr, int fsc)
> +{
> + return (EC_GPC << ARM_EL_EC_SHIFT) | ARM_EL_IL | (s2ptw << 21)
> + | (ind << 20) | (gpcsc << 14) | (cm << 8) | (s1ptw << 7)
> + | (wnr << 6) | fsc;
> +}
I guess we can add VNCR (bit 13) when we implement FEAT_NV2...
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
thanks
-- PMM
next prev parent reply other threads:[~2023-02-10 13:33 UTC|newest]
Thread overview: 54+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-24 0:00 [PATCH 00/22] target/arm: Implement FEAT_RME Richard Henderson
2023-01-24 0:00 ` [PATCH 01/22] target/arm: Fix pmsav8 stage2 secure parameter Richard Henderson
2023-02-07 14:26 ` Peter Maydell
2023-01-24 0:00 ` [PATCH 02/22] target/arm: Rewrite check_s2_mmu_setup Richard Henderson
2023-02-07 16:00 ` Peter Maydell
2023-02-07 19:31 ` Richard Henderson
2023-01-24 0:00 ` [PATCH 03/22] target/arm: Add isar_feature_aa64_rme Richard Henderson
2023-02-07 14:31 ` Peter Maydell
2023-01-24 0:00 ` [PATCH 04/22] target/arm: Update SCR and HCR for RME Richard Henderson
2023-02-07 14:34 ` Peter Maydell
2023-01-24 0:00 ` [PATCH 05/22] target/arm: SCR_EL3.NS may be RES1 Richard Henderson
2023-02-07 14:39 ` Peter Maydell
2023-02-07 19:43 ` Richard Henderson
2023-01-24 0:00 ` [PATCH 06/22] target/arm: Add RME cpregs Richard Henderson
2023-02-07 14:53 ` Peter Maydell
2023-02-08 21:51 ` Richard Henderson
2023-01-24 0:00 ` [PATCH 07/22] target/arm: Introduce ARMSecuritySpace Richard Henderson
2023-02-07 15:00 ` Peter Maydell
2023-02-08 22:00 ` Richard Henderson
2023-01-24 0:00 ` [PATCH 08/22] include/exec/memattrs: Add two bits of space to MemTxAttrs Richard Henderson
2023-02-07 15:05 ` Peter Maydell
2023-02-08 22:12 ` Richard Henderson
2023-01-24 0:00 ` [PATCH 09/22] target/arm: Adjust the order of Phys and Stage2 ARMMMUIdx Richard Henderson
2023-02-07 15:07 ` Peter Maydell
2023-01-24 0:00 ` [PATCH 10/22] target/arm: Introduce ARMMMUIdx_Phys_{Realm,Root} Richard Henderson
2023-02-07 15:09 ` Peter Maydell
2023-01-24 0:00 ` [PATCH 11/22] target/arm: Pipe ARMSecuritySpace through ptw.c Richard Henderson
2023-02-07 16:15 ` Peter Maydell
2023-01-24 0:00 ` [PATCH 12/22] target/arm: NSTable is RES0 for the RME EL3 regime Richard Henderson
2023-02-10 11:36 ` Peter Maydell
2023-02-10 19:49 ` Richard Henderson
2023-01-24 0:00 ` [PATCH 13/22] target/arm: Handle Block and Page bits for security space Richard Henderson
2023-02-10 11:53 ` Peter Maydell
2023-01-24 0:00 ` [PATCH 14/22] target/arm: Handle no-execute for Realm and Root regimes Richard Henderson
2023-02-10 11:59 ` Peter Maydell
2023-01-24 0:00 ` [PATCH 15/22] target/arm: Use get_phys_addr_with_struct in S1_ptw_translate Richard Henderson
2023-02-10 13:21 ` Peter Maydell
2023-01-24 0:00 ` [PATCH 16/22] target/arm: Move s1_is_El0 into S1Translate Richard Henderson
2023-02-10 13:23 ` Peter Maydell
2023-01-24 0:00 ` [PATCH 17/22] target/arm: Use get_phys_addr_with_struct for stage2 Richard Henderson
2023-02-10 13:28 ` Peter Maydell
2023-02-20 22:15 ` Richard Henderson
2023-02-21 11:11 ` Peter Maydell
2023-01-24 0:00 ` [PATCH 18/22] target/arm: Add GPC syndrome Richard Henderson
2023-02-10 13:32 ` Peter Maydell [this message]
2023-01-24 0:00 ` [PATCH 19/22] target/arm: Implement GPC exceptions Richard Henderson
2023-02-10 13:53 ` Peter Maydell
2023-01-24 0:00 ` [PATCH 20/22] target/arm: Implement the granule protection check Richard Henderson
2023-02-10 14:18 ` Peter Maydell
2023-01-24 0:00 ` [PATCH 21/22] target/arm: Enable RME for -cpu max Richard Henderson
2023-02-10 14:20 ` Peter Maydell
2023-02-20 23:31 ` Richard Henderson
2023-01-24 0:00 ` [RFC PATCH 22/22] hw/arm/virt: Add some memory for Realm Management Monitor Richard Henderson
2023-02-10 14:24 ` Peter Maydell
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=CAFEAcA_Gqzf6FZbVuPdkk_MvKbaPDY7Aa86CRqwVFDOPfh-o3w@mail.gmail.com \
--to=peter.maydell@linaro.org \
--cc=jonathan.cameron@huawei.com \
--cc=leonardo.garcia@linaro.org \
--cc=qemu-arm@nongnu.org \
--cc=qemu-devel@nongnu.org \
--cc=richard.henderson@linaro.org \
--cc=yier.jin@huawei.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).