From: Peter Maydell <peter.maydell@linaro.org>
To: Yifei Jiang <jiangyifei@huawei.com>
Cc: zhanghailiang <zhang.zhanghailiang@huawei.com>,
limingwang@huawei.com, victor.zhangxiaofeng@huawei.com,
QEMU Developers <qemu-devel@nongnu.org>,
Euler Robot <euler.robot@huawei.com>,
Paolo Bonzini <pbonzini@redhat.com>,
dengkai1@huawei.com, Richard Henderson <rth@twiddle.net>
Subject: Re: [PATCH 2/2] accel/tcg: avoid integer overflow
Date: Mon, 16 Mar 2020 12:55:31 +0000 [thread overview]
Message-ID: <CAFEAcA_JC70gt140h6r9o1DrjaBXAatJCdjc+wYKL3ZPiZAZEg@mail.gmail.com> (raw)
In-Reply-To: <20200316114050.3167-3-jiangyifei@huawei.com>
On Mon, 16 Mar 2020 at 12:14, Yifei Jiang <jiangyifei@huawei.com> wrote:
>
> This fixes coverity issues 75235919, etc.,
> 1524 /* Handle CPU specific unaligned behaviour */
> CID 75235919: (OVERFLOW_BEFORE_WIDEN)
> 1525. overflow_before_widen: Potentially overflowing expression "1 << a_bits" with type "int" (32 bits, signed) is evaluated using 32-bit arithmetic, and then used in a context that expects an expression of type "target_ulong" (64 bits, unsigned).
> 1525 if (addr & ((1 << a_bits) - 1)) {
This is a Coverity false positive. The value of a_bits in
these cases can never be big enough for 1 << a_bits
to overflow, because it indicates an alignment requirement
and will at most be 6 (indicating a 64-byte-alignment).
thanks
-- PMM
next prev parent reply other threads:[~2020-03-16 14:55 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-16 11:40 [PATCH 0/2] avoid integer overflow Yifei Jiang
2020-03-16 11:40 ` [PATCH 1/2] tcg: " Yifei Jiang
2020-03-16 14:04 ` Peter Maydell
2020-03-16 11:40 ` [PATCH 2/2] accel/tcg: " Yifei Jiang
2020-03-16 12:55 ` Peter Maydell [this message]
2020-03-16 12:56 ` [PATCH 0/2] " Peter Maydell
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