From: Peter Maydell <peter.maydell@linaro.org>
To: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Cc: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>,
"qemu-devel@nongnu.org Developers" <qemu-devel@nongnu.org>,
"Andreas Färber" <afaerber@suse.de>,
"Patch Tracking" <patches@linaro.org>
Subject: Re: [Qemu-devel] [PATCH 3/5] hw/arm/boot: Configure secure GIC to make IRQs NS if booting an NS kernel
Date: Thu, 2 Jul 2015 13:41:55 +0100 [thread overview]
Message-ID: <CAFEAcA_NAmqJr7cv_qyiws71vRXvaHMYxc4RtVR7ratwkKGODA@mail.gmail.com> (raw)
In-Reply-To: <CAEgOgz6DK3nzfs6Vs=6PFOBY6oXUjqwF0MpHHExHgYp-Km8vUg@mail.gmail.com>
On 30 June 2015 at 21:10, Peter Crosthwaite
<peter.crosthwaite@xilinx.com> wrote:
> On Tue, Jun 30, 2015 at 12:42 PM, Peter Maydell
> <peter.maydell@linaro.org> wrote:
>> On 30 June 2015 at 20:01, Peter Crosthwaite
>> <peter.crosthwaite@xilinx.com> wrote:
>>> So I actually had my own patches for this one that went in a different
>>> direction. The reason is, there are also other devs out there which
>>> need post-firmware state setup. The one I an thinking of mainly is the
>>> Zynq SLCR setup for non-firmware boots, I.E. the Linux kernel expects
>>> firmware to setup devices to some sort of initialized state (mainly
>>> turning clocks on). I think this GIC setup falls in the same category.
>>> The third use case is the GIC_CPU_IF stuff currently managed by
>>> machine code in boot.c that could be outsourced to GIC (in either a
>>> similar way to what is done here, or more fully outsourced using my
>>> new API).
>>
>> I'm a bit torn here -- I don't want to make it *too* easy for
>> people to add linux-booting specific code to random devices,
>> as this will lead to the bootloader code having its tentacles
>> everywhere within the tree...
So I thought about this a bit, and I guess that having a general
interface is probably better than specifically setting a GIC
property. It does need to be called once at arm_kernel_load_notify
time, not as a reset hook. I also think it should pass in the
arm_boot_info* as a parameter. This would let the GIC do the
right thing based on whether we're booting S or NS.
Are you planning to respin this patchset, or should I just pull
the relevant bits into my series?
thanks
-- PMM
next prev parent reply other threads:[~2015-07-02 12:42 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-06-30 13:07 [Qemu-devel] [PATCH 0/5] arm: enable TZ support for the GIC Peter Maydell
2015-06-30 13:07 ` [Qemu-devel] [PATCH 1/5] hw/intc/arm_gic_common.c: Reset all registers Peter Maydell
2015-06-30 13:07 ` [Qemu-devel] [PATCH 2/5] hw/intc/arm_gic_common: Provide property to make IRQs reset as NonSecure Peter Maydell
2015-06-30 13:07 ` [Qemu-devel] [PATCH 3/5] hw/arm/boot: Configure secure GIC to make IRQs NS if booting an NS kernel Peter Maydell
2015-06-30 19:01 ` Peter Crosthwaite
2015-06-30 19:42 ` Peter Maydell
2015-06-30 20:10 ` Peter Crosthwaite
2015-06-30 20:16 ` Peter Maydell
2015-06-30 20:24 ` Peter Crosthwaite
2015-07-02 12:41 ` Peter Maydell [this message]
2015-07-04 19:08 ` Peter Crosthwaite
2015-06-30 13:07 ` [Qemu-devel] [PATCH 4/5] hw/cpu/{a15mpcore, a9mpcore}: enable TrustZone in GIC if it is enabled in CPUs Peter Maydell
2015-06-30 13:07 ` [Qemu-devel] [PATCH 5/5] hw/arm/virt: Enable TZ extensions on the GIC if we are using them Peter Maydell
2015-07-07 13:27 ` [Qemu-devel] [PATCH 0/5] arm: enable TZ support for the GIC Peter Maydell
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