From mboxrd@z Thu Jan  1 00:00:00 1970
Received: from eggs.gnu.org ([2001:4830:134:3::10]:42761)
	by lists.gnu.org with esmtp (Exim 4.71)
	(envelope-from <peter.maydell@linaro.org>) id 1bHWsr-00054J-RV
	for qemu-devel@nongnu.org; Mon, 27 Jun 2016 09:47:30 -0400
Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)
	(envelope-from <peter.maydell@linaro.org>) id 1bHWsq-0001S5-0x
	for qemu-devel@nongnu.org; Mon, 27 Jun 2016 09:47:28 -0400
Received: from mail-vk0-x230.google.com ([2607:f8b0:400c:c05::230]:35056)
	by eggs.gnu.org with esmtp (Exim 4.71)
	(envelope-from <peter.maydell@linaro.org>) id 1bHWsp-0001Ry-SY
	for qemu-devel@nongnu.org; Mon, 27 Jun 2016 09:47:27 -0400
Received: by mail-vk0-x230.google.com with SMTP id j2so232380140vkg.2
	for <qemu-devel@nongnu.org>; Mon, 27 Jun 2016 06:47:27 -0700 (PDT)
MIME-Version: 1.0
In-Reply-To: <1466744305-23163-1-git-send-email-andrew@aj.id.au>
References: <1466744305-23163-1-git-send-email-andrew@aj.id.au>
From: Peter Maydell <peter.maydell@linaro.org>
Date: Mon, 27 Jun 2016 14:47:07 +0100
Message-ID: <CAFEAcA_O_vPM=97KYWDcmsT8SeHBrcoi6JsEnp2J0mjEptZJ2A@mail.gmail.com>
Content-Type: text/plain; charset=UTF-8
Subject: Re: [Qemu-devel] [PATCH v3 0/3] Add ASPEED SCU device
List-Id: <qemu-devel.nongnu.org>
List-Unsubscribe: <https://lists.nongnu.org/mailman/options/qemu-devel>,
	<mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>
List-Archive: <http://lists.nongnu.org/archive/html/qemu-devel/>
List-Post: <mailto:qemu-devel@nongnu.org>
List-Help: <mailto:qemu-devel-request@nongnu.org?subject=help>
List-Subscribe: <https://lists.nongnu.org/mailman/listinfo/qemu-devel>,
	<mailto:qemu-devel-request@nongnu.org?subject=subscribe>
To: Andrew Jeffery <andrew@aj.id.au>
Cc: =?UTF-8?Q?C=C3=A9dric_Le_Goater?= <clg@kaod.org>, Joel Stanley <joel@jms.id.au>, QEMU Developers <qemu-devel@nongnu.org>, qemu-arm <qemu-arm@nongnu.org>

On 24 June 2016 at 05:58, Andrew Jeffery <andrew@aj.id.au> wrote:
> Hi all,
>
> These are three patches implementing minimal functionality for the ASPEED System
> Control Unit device and integrating it into the AST2400 SoC model/palmetto-bmc
> machine. The device is critical for initialisation of u-boot and the kernel as
> it provides chip level control registers, influencing the configuration of the
> software and the software's configuration of the SoC.
>
> Since v2:
>
> * Fix mixing of offsets and register indexes
> * Sanity check device property values
> * SoC actually initialises the silicon revision
>
> Since v1:
>
> * Select reset values based on silicon revision
> * Expose hardware strapping values via properties
>
> Andrew Jeffery (3):
>   hw/misc: Add a model for the ASPEED System Control Unit
>   ast2400: Integrate the SCU model and set silicon revision
>   palmetto-bmc: Configure the SCU's hardware strapping register



Applied to target-arm.next, thanks.

-- PMM