From: Peter Maydell <peter.maydell@linaro.org>
To: "Philippe Mathieu-Daudé" <philmd@linaro.org>
Cc: qemu-devel@nongnu.org, Aurelien Jarno <aurelien@aurel32.net>,
Eduardo Habkost <eduardo@habkost.net>,
Yanan Wang <wangyanan55@huawei.com>,
"Edgar E. Iglesias" <edgar.iglesias@gmail.com>,
qemu-ppc@nongnu.org,
Marcel Apfelbaum <marcel.apfelbaum@gmail.com>,
Aleksandar Rikalo <arikalo@gmail.com>,
Daniel Henrique Barboza <danielhb413@gmail.com>,
Nicholas Piggin <npiggin@gmail.com>,
qemu-arm@nongnu.org, Zhao Liu <zhao1.liu@intel.com>,
Jiaxun Yang <jiaxun.yang@flygoat.com>
Subject: Re: [PATCH 2/8] hw/core/cpu: Introduce CPUClass::is_big_endian() handler
Date: Fri, 4 Oct 2024 17:41:46 +0100 [thread overview]
Message-ID: <CAFEAcA_X38bhELuwwKLPrbfC+vLnwpUHP5RNCDv1V2r69dbJ7w@mail.gmail.com> (raw)
In-Reply-To: <20241004162118.84570-3-philmd@linaro.org>
On Fri, 4 Oct 2024 at 17:22, Philippe Mathieu-Daudé <philmd@linaro.org> wrote:
>
> Introduce the CPUClass::is_big_endian() handler and its
> common default.
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
> include/hw/core/cpu.h | 3 ++-
> hw/core/cpu-common.c | 7 +++++++
> 2 files changed, 9 insertions(+), 1 deletion(-)
>
> diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h
> index 04e9ad49968..22ef7a44e86 100644
> --- a/include/hw/core/cpu.h
> +++ b/include/hw/core/cpu.h
> @@ -150,6 +150,7 @@ struct CPUClass {
> ObjectClass *(*class_by_name)(const char *cpu_model);
> void (*parse_features)(const char *typename, char *str, Error **errp);
>
> + bool (*is_big_endian)(CPUState *cpu);
> bool (*has_work)(CPUState *cpu);
> int (*mmu_index)(CPUState *cpu, bool ifetch);
> int (*memory_rw_debug)(CPUState *cpu, vaddr addr,
What does this actually mean, though? Arm for instance
has multiple different kinds of "big-endian" depending
on the CPU: both BE32 and BE8, and data-endianness not
necessarily being the same as instruction-endianness.
This series doesn't introduce any users of this new API.
It's hard to say without seeing what the intended use is,
but I would expect that probably they would want to be testing
something else, depending on what they're trying to do.
It's pretty uncommon for anything out in the system to
want to know what endianness a runtime-configurable CPU
happens to be set to, because in real hardware a device
has no way to tell. (This is why cpu_virtio_is_big_endian()
is named the way it is -- to discourage anybody from trying
to use it outside the virtio devices where we need it for
legacy "the spec wasn't written thinking about endianness
very hard" reasons.)
thanks
-- PMM
next prev parent reply other threads:[~2024-10-04 16:43 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-04 16:21 [PATCH 0/8] hw/core/cpu: Expose cpu_is_big_endian() method Philippe Mathieu-Daudé
2024-10-04 16:21 ` [PATCH 1/8] exec/tswap: Massage target_needs_bswap() definition Philippe Mathieu-Daudé
2024-10-04 16:21 ` [PATCH 2/8] hw/core/cpu: Introduce CPUClass::is_big_endian() handler Philippe Mathieu-Daudé
2024-10-04 16:41 ` Peter Maydell [this message]
2024-10-04 16:53 ` Philippe Mathieu-Daudé
2024-10-04 17:01 ` Peter Maydell
2024-10-04 16:21 ` [PATCH 3/8] target/arm: Implement CPUClass::is_big_endian Philippe Mathieu-Daudé
2024-10-04 16:21 ` [PATCH 4/8] target/microblaze: " Philippe Mathieu-Daudé
2024-10-04 16:21 ` [PATCH 5/8] target/mips: Declare mips_env_is_bigendian() in 'internal.h' Philippe Mathieu-Daudé
2024-10-04 16:21 ` [PATCH 6/8] target/mips: Implement CPUClass::is_big_endian Philippe Mathieu-Daudé
2024-10-04 16:21 ` [PATCH 7/8] target/ppc: Register CPUClass::is_big_endian Philippe Mathieu-Daudé
2024-10-04 16:21 ` [PATCH 8/8] hw/core/cpu: Expose cpu_is_big_endian() method Philippe Mathieu-Daudé
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