From: Peter Maydell <peter.maydell@linaro.org>
To: Richard Henderson <richard.henderson@linaro.org>
Cc: qemu-devel@nongnu.org, broonie@kernel.org, qemu-arm@nongnu.org
Subject: Re: [PATCH 0/2] target/arm: Two SME fixes
Date: Thu, 14 Jul 2022 15:39:56 +0100 [thread overview]
Message-ID: <CAFEAcA_f=YOWRk078WWkoCKAt+ccEUc3csDcpwO7FwZMNsu0gA@mail.gmail.com> (raw)
In-Reply-To: <20220713045848.217364-1-richard.henderson@linaro.org>
On Wed, 13 Jul 2022 at 05:59, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> Ho hum. Let a feature loose on users and they find bugs. Mark noticed
> that the wrong value was being picked up for VL when SVE is disabled.
> I had run the same test but failed to notice the vector length wasn't
> as expected, though the test otherwise produced expected results.
>
>
Applied to target-arm.next, thanks.
-- PMM
prev parent reply other threads:[~2022-07-14 14:42 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-13 4:58 [PATCH 0/2] target/arm: Two SME fixes Richard Henderson
2022-07-13 4:58 ` [PATCH 1/2] target/arm: Fill in VL for tbflags when SME enabled and SVE disabled Richard Henderson
2022-07-13 4:58 ` [PATCH 2/2] target/arm: Fix aarch64_sve_change_el for SME Richard Henderson
2022-07-14 14:39 ` Peter Maydell [this message]
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