From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:46339) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VqVZl-0005ak-5g for qemu-devel@nongnu.org; Tue, 10 Dec 2013 17:14:50 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VqVZg-0003SK-5R for qemu-devel@nongnu.org; Tue, 10 Dec 2013 17:14:45 -0500 Received: from mail-pb0-f54.google.com ([209.85.160.54]:56155) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VqVZf-0003SB-WF for qemu-devel@nongnu.org; Tue, 10 Dec 2013 17:14:40 -0500 Received: by mail-pb0-f54.google.com with SMTP id un15so8648784pbc.27 for ; Tue, 10 Dec 2013 14:14:39 -0800 (PST) MIME-Version: 1.0 In-Reply-To: <20131210214239.11040.11449@loki> References: <1386282785-466-1-git-send-email-mdroth@linux.vnet.ibm.com> <1386282785-466-11-git-send-email-mdroth@linux.vnet.ibm.com> <20131210214239.11040.11449@loki> From: Peter Maydell Date: Tue, 10 Dec 2013 22:14:18 +0000 Message-ID: Content-Type: text/plain; charset=UTF-8 Subject: Re: [Qemu-devel] [PATCH v2 10/14] pci: allow 0 address for PCI IO regions List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Michael Roth Cc: "qemu-ppc@nongnu.org" , Alexey Kardashevskiy , QEMU Developers , Alexander Graf , Mike Day , Paul Mackerras , tyreld@linux.vnet.ibm.com, nfont@linux.vnet.ibm.com On 10 December 2013 21:42, Michael Roth wrote: > Quoting Peter Maydell (2013-12-05 17:33:48) >> And presumably whoever put that specific check for 0 into >> QEMU had a reason for it. >> >> On the other hand I can't now find whatever document it was >> that I was reading that claimed 0 wasn't valid :-( > > Can't seem to find anything either, checked the 2.3 spec as well. I tried to > look up the git history for the new_addr == 0 check but unfortunately it seemed > to be part of the initial check-in. > > The only clue I've found regarding special-casing for a 0-bar is this: > > "Power-up software can determine how much address space the device requires by > writing a value of all 1's to the register and then reading the value back. The > device will return 0's in all don't-care address bits, effectively specifying > the address space required. Unimplemented Base Address registers are hardwired > to zero." - PCI 3.0, 6.2.5.1 Googling again brought up this mailing list thread: http://www.pcisig.com/reflector/msg00459.html which includes what is supposedly a quote from the PCI 2.1 spec: # "Note: A Base Address register does not contain a valid # address when it is equal to "0"" (I don't have access to the 2.1 version to check.) This text seems to have been removed from the 2.2 spec. thanks -- PMM