Re: [Qemu-devel] [PATCH] Add Alistair as a RISC-V Maintainer

[Peter Maydell <peter.maydell@linaro.org>]

On 29 October 2018 at 17:14, Palmer Dabbelt <palmer@sifive.com> wrote:
> I don't think we have anything ready to go right now: your PCIe patches
> still have some outstanding feedback (on interrupt stuff), and Bastian's
> decodetree stuff has some patches from Richard Henderson that should be
> merged in.  I was hoping to get through reviewing Michael's patches to fix
> the FS dirty bit, but haven't had time yet -- they're tested, but I haven't
> actually read through them.
>
> Maybe we should get a RISC-V QEMU mailing list so we can keep everyone in
> sync without spamming the whole world?

We can sort out a qemu-riscv mailing list like the ones we have
for ppc and arm if you like:
https://wiki.qemu.org/Contribute/MailingLists

Our general principle is that all posts should cc qemu-devel as
well as the subsystem list; the idea is that if you only care
about riscv you can just subscribe to the lower volume list, but
people on qemu-devel still get to see everything without having
to subscribe to half a dozen different other lists.

NB: softfreeze is tomorrow, which is our deadline by which any
pull requests for new feature work should be on the mailing list.
After that it's bugfixes only. So my feeling is that both the
decodetree and the PCI patches have missed the boat for 3.1
and can be dealt with in a more leisurely timescale.

If you have bugfixes in your tree that could do with being
upstreamed, this is a good time in the release cycle to look
at doing that, I think.

thanks
-- PMM