From: Peter Maydell <peter.maydell@linaro.org>
To: Jacob Abrams <satur9nine@gmail.com>
Cc: qemu-devel@nongnu.org, philmd@linaro.org
Subject: Re: [PATCH] hw/char/stm32l4x5_usart.c: Enable USART ACK bit response
Date: Tue, 17 Sep 2024 16:00:15 +0100 [thread overview]
Message-ID: <CAFEAcA_q4A2XCHXo7-HUYJr_zSeaLXbtUg83pZ50f8t6hLPYMQ@mail.gmail.com> (raw)
In-Reply-To: <20240911043255.51966-1-satur9nine@gmail.com>
On Wed, 11 Sept 2024 at 05:33, Jacob Abrams <satur9nine@gmail.com> wrote:
>
> SW modifying USART_CR1 TE bit should cuase HW to respond by altering
> USART_ISR TEACK bit, and likewise for RE and REACK bit.
>
> This resolves some but not all issues necessary for the official STM USART
> HAL driver to function as is.
>
> Fixes: 87b77e6e01ca ("hw/char/stm32l4x5_usart: Enable serial read and write")
> Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2540
> Signed-off-by: Jacob Abrams <satur9nine@gmail.com>
> ---
Applied to target-arm.next, thanks.
-- PMM
next prev parent reply other threads:[~2024-09-17 15:01 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-09-11 4:32 [PATCH] hw/char/stm32l4x5_usart.c: Enable USART ACK bit response Jacob Abrams
2024-09-17 15:00 ` Peter Maydell [this message]
2024-09-20 4:32 ` Michael Tokarev
2024-09-20 4:35 ` Michael Tokarev
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