From mboxrd@z Thu Jan  1 00:00:00 1970
Received: from eggs.gnu.org ([2001:4830:134:3::10]:50405)
	by lists.gnu.org with esmtp (Exim 4.71)
	(envelope-from <peter.maydell@linaro.org>) id 1WhkFS-0001yl-7F
	for qemu-devel@nongnu.org; Tue, 06 May 2014 14:37:56 -0400
Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)
	(envelope-from <peter.maydell@linaro.org>) id 1WhkFM-0001fA-39
	for qemu-devel@nongnu.org; Tue, 06 May 2014 14:37:50 -0400
Received: from mail-lb0-f179.google.com ([209.85.217.179]:60110)
	by eggs.gnu.org with esmtp (Exim 4.71)
	(envelope-from <peter.maydell@linaro.org>) id 1WhkFL-0001es-SP
	for qemu-devel@nongnu.org; Tue, 06 May 2014 14:37:44 -0400
Received: by mail-lb0-f179.google.com with SMTP id c11so5216377lbj.24
	for <qemu-devel@nongnu.org>; Tue, 06 May 2014 11:37:42 -0700 (PDT)
MIME-Version: 1.0
In-Reply-To: <20140505080520.25523.44406.stgit@bahia.local>
References: <20140505074816.25523.71374.stgit@bahia.local>
	<20140505080520.25523.44406.stgit@bahia.local>
From: Peter Maydell <peter.maydell@linaro.org>
Date: Tue, 6 May 2014 19:37:22 +0100
Message-ID: <CAFEAcA_uHdSPt73DcHBOZu2zGdoKFq5d19gC7K6V=-Z6r9RYSg@mail.gmail.com>
Content-Type: text/plain; charset=UTF-8
Subject: Re: [Qemu-devel] [PATCH v3 3/4] target-ppc: ppc can be either endian
List-Id: <qemu-devel.nongnu.org>
List-Unsubscribe: <https://lists.nongnu.org/mailman/options/qemu-devel>,
	<mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>
List-Archive: <http://lists.nongnu.org/archive/html/qemu-devel>
List-Post: <mailto:qemu-devel@nongnu.org>
List-Help: <mailto:qemu-devel-request@nongnu.org?subject=help>
List-Subscribe: <https://lists.nongnu.org/mailman/listinfo/qemu-devel>,
	<mailto:qemu-devel-request@nongnu.org?subject=subscribe>
To: Greg Kurz <gkurz@linux.vnet.ibm.com>
Cc: QEMU Developers <qemu-devel@nongnu.org>, bharata@linux.vnet.ibm.com, "qemu-ppc@nongnu.org" <qemu-ppc@nongnu.org>, =?UTF-8?Q?Andreas_F=C3=A4rber?= <afaerber@suse.de>, Alexander Graf <agraf@suse.de>

On 5 May 2014 09:07, Greg Kurz <gkurz@linux.vnet.ibm.com> wrote:
> POWER7, POWER7+ and POWER8 families use the ILE bit of the LPCR
> special purpose register to decide the endianness to use when
> entering interrupt handlers. When running a Linux guest, this
> provides a hint on the endianness used by the kernel. From a
> QEMU point of view, the information is needed for legacy virtio
> support and crash dump support as well.

Do you care about the case of:
 * kernel bigendian
 * userspace littleendian (or vice-versa)
 * guest kernel passes virtio device through to guest userspace
 * guest userspace is doing the manipulation of the device

?

(Will Deacon just suggested this as a possibility on the
kvm-arm mailing list...)

Also, are we documenting what the process should be for a
virtio implementation to decide the endianness for a particular
architecture? I assume we'd like kvmtool and QEMU to do
the same thing rather than subtly different things...

thanks
-- PMM