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Mon, 11 Jan 2021 09:42:05 -0800 (PST) MIME-Version: 1.0 References: <20200901104043.91383-1-f4bug@amsat.org> <20200901104043.91383-5-f4bug@amsat.org> <20210111011117.GA215408@ubuntu-m3-large-x86> In-Reply-To: <20210111011117.GA215408@ubuntu-m3-large-x86> From: Peter Maydell Date: Mon, 11 Jan 2021 17:41:54 +0000 Message-ID: Subject: Re: [PATCH 4/5] hw/ppc/ppc4xx_pci: Replace pointless warning by assert() To: Nathan Chancellor Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass client-ip=2a00:1450:4864:20::636; envelope-from=peter.maydell@linaro.org; helo=mail-ej1-x636.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= , QEMU Developers , Aleksandar Markovic , qemu-ppc , Guenter Roeck , Greg Kurz , Aurelien Jarno , David Gibson Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On Mon, 11 Jan 2021 at 01:11, Nathan Chancellor wrote: > > On Tue, Sep 01, 2020 at 12:40:42PM +0200, Philippe Mathieu-Daud=C3=A9 wro= te: > > We call pci_register_root_bus() to register 4 IRQs with the > > ppc4xx_pci_set_irq() handler. As it can only be called with > > values in the [0-4[ range, replace the pointless warning by > > an assert(). > > > > Signed-off-by: Philippe Mathieu-Daud=C3=A9 > Hopefully reporting this here is okay, I find Launchpad hard to use but > I can file it there if need be. > > The assertion added by this patch triggers while trying to boot a > ppc44x_defconfig Linux kernel: This is the same issue reported here by Guenter: https://lore.kernel.org/qemu-devel/3f0f8fc6-6148-a76e-1088-b7882b0bbcaf@roe= ck-us.net/ It's still there in master (you can see it if you apply my fix https://patchew.org/QEMU/20210111171623.18871-1-peter.maydell@linaro.org/ to get past the earlier kernel panic). The QEMU code as it stands for the Bamboo PCI interrupts is clearly wrong. The problem is that I don't know what the hardware's actual behaviour is, so it's hard to fix the model... A comment in hw/ppc/ppc4xx_pci.c claims "On Bamboo, all pins from each slot are tied to a single board IRQ." Code in hw/ppc/ppc440_bamboo.c wires four irq lines from the PCI controller up to UIC lines 25, 26, 27, 28. Does anybody have documentation for this board ? What is Linux expecting the PCI IRQ wiring to be (not necessarily an indication that that's what the h/w does, but a useful clue :-)) ? thanks -- PMM