From: Peter Maydell <peter.maydell@linaro.org>
To: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Cc: Edgar Iglesias <edgar.iglesias@xilinx.com>,
QEMU Developers <qemu-devel@nongnu.org>,
Alistair Francis <alistair.francis@xilinx.com>
Subject: Re: [Qemu-devel] [PATCH target-arm v5 3/5] zynq_slcr: Implement CPU reset
Date: Mon, 27 Jan 2014 17:43:12 +0000 [thread overview]
Message-ID: <CAFEAcA_wY+RWE+DcL3013ON8vx2nxMBKU-itzT20KOLru+-aMA@mail.gmail.com> (raw)
In-Reply-To: <9889c4fcc2d9dc0d566d78de6213bebf2b5ef855.1389776859.git.peter.crosthwaite@xilinx.com>
On 15 January 2014 09:14, Peter Crosthwaite
<peter.crosthwaite@xilinx.com> wrote:
> Implement the CPU reset IO line of the A9_CPU_RST_CTRL register
> (offset 0x244). This is trivial GPIO mapping straight to the register
> bits.
>
> Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
thanks
-- PMM
next prev parent reply other threads:[~2014-01-27 17:43 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-01-15 9:12 [Qemu-devel] [PATCH target-arm v5 0/5] Reset and Halting modifications + Zynq SMP Peter Crosthwaite
2014-01-15 9:13 ` [Qemu-devel] [PATCH target-arm v5 1/5] arm: zynq: Macroify OCM Base and Size Peter Crosthwaite
2014-01-27 17:41 ` Peter Maydell
2014-01-15 9:13 ` [Qemu-devel] [PATCH target-arm v5 2/5] arm: zynq: added SMP support Peter Crosthwaite
2014-01-27 17:42 ` Peter Maydell
2014-01-15 9:14 ` [Qemu-devel] [PATCH target-arm v5 3/5] zynq_slcr: Implement CPU reset Peter Crosthwaite
2014-01-27 17:43 ` Peter Maydell [this message]
2014-01-15 9:14 ` [Qemu-devel] [PATCH target-arm v5 4/5] arm: Implement reset GPIO Peter Crosthwaite
2014-01-27 17:52 ` Peter Maydell
2014-01-28 0:48 ` Peter Crosthwaite
2014-01-28 9:22 ` Peter Maydell
2014-02-12 5:20 ` Peter Crosthwaite
2014-01-28 9:28 ` Andreas Färber
2014-01-15 9:15 ` [Qemu-devel] [PATCH target-arm v5 5/5] arm: zynq: Connect CPU resets to SLCR Peter Crosthwaite
2014-01-24 8:51 ` [Qemu-devel] [PATCH target-arm v5 0/5] Reset and Halting modifications + Zynq SMP Peter Crosthwaite
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