From: Havard Skinnemoen <hskinnemoen@google.com>
To: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
Cc: "Peter Maydell" <peter.maydell@linaro.org>,
qemu-arm <qemu-arm@nongnu.org>,
"QEMU Developers" <qemu-devel@nongnu.org>,
"IS20 Avi Fishman" <Avi.Fishman@nuvoton.com>,
"CS20 KFTing" <kfting@nuvoton.com>,
"Cédric Le Goater" <clg@kaod.org>
Subject: Re: [PATCH v9 11/14] hw/arm: Wire up BMC boot flash for npcm750-evb and quanta-gsj
Date: Sat, 12 Sep 2020 15:24:58 -0700 [thread overview]
Message-ID: <CAFQmdRbjH7=6VE=dDVNmKGenHoseKnNNr3SLcQojo0doS+gT7Q@mail.gmail.com> (raw)
In-Reply-To: <e852efda-b8d9-0e41-8b1b-ed7cb01e7f51@amsat.org>
[-- Attachment #1: Type: text/plain, Size: 3212 bytes --]
On Fri, Sep 11, 2020 at 5:46 AM Philippe Mathieu-Daudé <f4bug@amsat.org>
wrote:
>
>
> On 9/11/20 7:20 AM, Havard Skinnemoen via wrote:
> > This allows these NPCM7xx-based boards to boot from a flash image, e.g.
> > one built with OpenBMC. For example like this:
> >
> > IMAGE=${OPENBMC}/build/tmp/deploy/images/gsj/image-bmc
> > qemu-system-arm -machine quanta-gsj -nographic \
> > -drive file=${IMAGE},if=mtd,bus=0,unit=0,format=raw,snapshot=on
> >
> > Reviewed-by: Tyrone Ting <kfting@nuvoton.com>
> > Reviewed-by: Cédric Le Goater <clg@kaod.org>
> > Tested-by: Cédric Le Goater <clg@kaod.org>
> > Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> > Signed-off-by: Havard Skinnemoen <hskinnemoen@google.com>
> > ---
> > hw/arm/npcm7xx_boards.c | 20 ++++++++++++++++++++
> > 1 file changed, 20 insertions(+)
> >
> > diff --git a/hw/arm/npcm7xx_boards.c b/hw/arm/npcm7xx_boards.c
> > index b4c772d6b5..79e2e2744c 100644
> > --- a/hw/arm/npcm7xx_boards.c
> > +++ b/hw/arm/npcm7xx_boards.c
> > @@ -20,6 +20,7 @@
> > #include "hw/arm/npcm7xx.h"
> > #include "hw/core/cpu.h"
> > #include "hw/loader.h"
> > +#include "hw/qdev-properties.h"
> > #include "qapi/error.h"
> > #include "qemu-common.h"
> > #include "qemu/units.h"
> > @@ -55,6 +56,22 @@ static void npcm7xx_load_bootrom(MachineState
> *machine, NPCM7xxState *soc)
> > }
> > }
> >
> > +static void npcm7xx_connect_flash(NPCM7xxFIUState *fiu, int cs_no,
> > + const char *flash_type, DriveInfo
> *dinfo)
> > +{
> > + DeviceState *flash;
> > + qemu_irq flash_cs;
> > +
> > + flash = qdev_new(flash_type);
> > + if (dinfo) {
> > + qdev_prop_set_drive(flash, "drive", blk_by_legacy_dinfo(dinfo));
> > + }
> > + qdev_realize_and_unref(flash, BUS(fiu->spi), &error_fatal);
> > +
> > + flash_cs = qdev_get_gpio_in_named(flash, SSI_GPIO_CS, 0);
> > + qdev_connect_gpio_out_named(DEVICE(fiu), "cs", cs_no, flash_cs);
> > +}
> > +
> > static void npcm7xx_connect_dram(NPCM7xxState *soc, MemoryRegion *dram)
> > {
> > memory_region_add_subregion(get_system_memory(), NPCM7XX_DRAM_BA,
> dram);
> > @@ -92,6 +109,7 @@ static void npcm750_evb_init(MachineState *machine)
> > qdev_realize(DEVICE(soc), NULL, &error_fatal);
> >
> > npcm7xx_load_bootrom(machine, soc);
> > + npcm7xx_connect_flash(&soc->fiu[0], 0, "w25q256", drive_get(IF_MTD,
> 0, 0));
>
> Nitpicking: add definition for '0' magic number
> (consider as future cleanup).
>
Thanks. I've made the change, but won't send it out until this series is
merged, or I'll fold it in if I need to do another iteration for other
reasons.
> npcm7xx_load_kernel(machine, soc);
> > }
> >
> > @@ -104,6 +122,8 @@ static void quanta_gsj_init(MachineState *machine)
> > qdev_realize(DEVICE(soc), NULL, &error_fatal);
> >
> > npcm7xx_load_bootrom(machine, soc);
> > + npcm7xx_connect_flash(&soc->fiu[0], 0, "mx25l25635e",
> > + drive_get(IF_MTD, 0, 0));
>
> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
>
> > npcm7xx_load_kernel(machine, soc);
> > }
> >
> >
>
[-- Attachment #2: Type: text/html, Size: 4751 bytes --]
next prev parent reply other threads:[~2020-09-12 22:26 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-11 5:20 [PATCH v9 00/14] Add Nuvoton NPCM730/NPCM750 SoCs and two BMC machines Havard Skinnemoen via
2020-09-11 5:20 ` [PATCH v9 01/14] hw/misc: Add NPCM7xx System Global Control Registers device model Havard Skinnemoen via
2020-09-11 5:20 ` [PATCH v9 02/14] hw/misc: Add NPCM7xx Clock Controller " Havard Skinnemoen via
2020-09-11 5:20 ` [PATCH v9 03/14] hw/timer: Add NPCM7xx Timer " Havard Skinnemoen via
2020-09-11 5:20 ` [PATCH v9 04/14] hw/arm: Add NPCM730 and NPCM750 SoC models Havard Skinnemoen via
2020-09-11 5:20 ` [PATCH v9 05/14] hw/arm: Add two NPCM7xx-based machines Havard Skinnemoen via
2020-09-11 5:20 ` [PATCH v9 06/14] roms: Add virtual Boot ROM for NPCM7xx SoCs Havard Skinnemoen via
2020-09-11 5:20 ` [PATCH v9 07/14] hw/arm: Load -bios image as a boot ROM for npcm7xx Havard Skinnemoen via
2020-09-11 5:20 ` [PATCH v9 08/14] hw/nvram: NPCM7xx OTP device model Havard Skinnemoen via
2022-12-22 15:03 ` Philippe Mathieu-Daudé
2023-02-23 10:44 ` Philippe Mathieu-Daudé
2023-03-01 3:42 ` KFTING
2023-03-05 7:41 ` Avi.Fishman
2023-03-06 12:49 ` Philippe Mathieu-Daudé
2020-09-11 5:20 ` [PATCH v9 09/14] hw/mem: Stubbed out NPCM7xx Memory Controller model Havard Skinnemoen via
2020-09-11 5:20 ` [PATCH v9 10/14] hw/ssi: NPCM7xx Flash Interface Unit device model Havard Skinnemoen via
2020-09-11 5:20 ` [PATCH v9 11/14] hw/arm: Wire up BMC boot flash for npcm750-evb and quanta-gsj Havard Skinnemoen via
2020-09-11 12:46 ` Philippe Mathieu-Daudé
2020-09-12 22:24 ` Havard Skinnemoen [this message]
2020-09-11 5:20 ` [PATCH v9 12/14] hw/arm/npcm7xx: add board setup stub for CPU and UART clocks Havard Skinnemoen via
2020-09-11 5:21 ` [PATCH v9 13/14] docs/system: Add Nuvoton machine documentation Havard Skinnemoen via
2020-09-11 5:21 ` [PATCH v9 14/14] tests/acceptance: console boot tests for quanta-gsj Havard Skinnemoen via
2020-09-11 12:48 ` [PATCH v9 00/14] Add Nuvoton NPCM730/NPCM750 SoCs and two BMC machines Philippe Mathieu-Daudé
2020-09-14 12:55 ` Peter Maydell
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to='CAFQmdRbjH7=6VE=dDVNmKGenHoseKnNNr3SLcQojo0doS+gT7Q@mail.gmail.com' \
--to=hskinnemoen@google.com \
--cc=Avi.Fishman@nuvoton.com \
--cc=clg@kaod.org \
--cc=f4bug@amsat.org \
--cc=kfting@nuvoton.com \
--cc=peter.maydell@linaro.org \
--cc=qemu-arm@nongnu.org \
--cc=qemu-devel@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).