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Wed, 17 May 2023 14:22:53 -0700 (PDT) MIME-Version: 1.0 References: <20230428132124.670840-1-nks@flawful.org> <20230428132124.670840-8-nks@flawful.org> In-Reply-To: <20230428132124.670840-8-nks@flawful.org> From: John Snow Date: Wed, 17 May 2023 17:22:42 -0400 Message-ID: Subject: Re: [PATCH 7/9] hw/ide/ahci: trigger either error IRQ or regular IRQ, not both To: Niklas Cassel Cc: qemu-block@nongnu.org, qemu-devel@nongnu.org, Damien Le Moal , Niklas Cassel Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass client-ip=170.10.133.124; envelope-from=jsnow@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On Fri, Apr 28, 2023 at 9:23=E2=80=AFAM Niklas Cassel wro= te: > > From: Niklas Cassel > > According to AHCI 1.3.1, 5.3.8.1 RegFIS:Entry, if ERR_STAT is set, > we jump to state ERR:FatalTaskfile, which will raise a TFES IRQ > unconditionally, regardless if the I bit is set in the FIS or not. > > Thus, we should never raise a normal IRQ after having sent an error > IRQ. > > Signed-off-by: Niklas Cassel ACK - and thanks for the spec pointers. > --- > hw/ide/ahci.c | 5 ++--- > 1 file changed, 2 insertions(+), 3 deletions(-) > > diff --git a/hw/ide/ahci.c b/hw/ide/ahci.c > index 2a59d0e0f5..d88961b4c0 100644 > --- a/hw/ide/ahci.c > +++ b/hw/ide/ahci.c > @@ -891,11 +891,10 @@ static bool ahci_write_fis_d2h(AHCIDevice *ad, bool= d2h_fis_i) > pr->tfdata =3D (ad->port.ifs[0].error << 8) | > ad->port.ifs[0].status; > > + /* TFES IRQ is always raised if ERR_STAT is set, regardless of I bit= . */ > if (d2h_fis[2] & ERR_STAT) { > ahci_trigger_irq(ad->hba, ad, AHCI_PORT_IRQ_BIT_TFES); > - } > - > - if (d2h_fis_i) { > + } else if (d2h_fis_i) { > ahci_trigger_irq(ad->hba, ad, AHCI_PORT_IRQ_BIT_DHRS); > } > > -- > 2.40.0 >